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authorOvidiu Panait <ovpanait@gmail.com>2022-05-31 21:14:26 +0300
committerMichal Simek <michal.simek@amd.com>2022-06-24 14:16:00 +0200
commitef0a592ae8e2961519510f48ffe48b655b31610a (patch)
tree2ca7f86b05e8c29a275ecceee3547b08083716b1 /board/xilinx
parent0ad71dc53af000609d4484a465e630e569e73d63 (diff)
microblaze: cache: improve dcache Kconfig options
Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'board/xilinx')
-rw-r--r--board/xilinx/microblaze-generic/Kconfig11
1 files changed, 11 insertions, 0 deletions
diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig
index 117b476f3f..b00ce6f59a 100644
--- a/board/xilinx/microblaze-generic/Kconfig
+++ b/board/xilinx/microblaze-generic/Kconfig
@@ -63,4 +63,15 @@ config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR
Memory address location of the exception vector table. It is
configurable via the C_BASE_VECTORS hdl parameter.
+config XILINX_MICROBLAZE0_USE_WDC
+ bool "MicroBlaze wdc instruction support"
+ default y
+ help
+ Enable this option if the MicroBlaze processor is configured with
+ support for the "wdc" (Write to Data Cache) instruction.
+
+config SPL_XILINX_MICROBLAZE0_USE_WDC
+ bool
+ default XILINX_MICROBLAZE0_USE_WDC
+
endif