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| author | Francesco Dolcini <francesco.dolcini@toradex.com> | 2024-02-13 15:58:05 +0100 |
|---|---|---|
| committer | Francesco Dolcini <francesco.dolcini@toradex.com> | 2024-02-14 09:09:01 +0100 |
| commit | a8177718dd3569cc0de63e4c907f9b35b10a64e7 (patch) | |
| tree | ea2c26c031b3376e49738c01de8b5d8841a849e3 /board/xes | |
| parent | e165cfda17511dd4a1d5ad00ef3bcee3763a6abe (diff) | |
Revert "board: verdin-am62: set cpu core voltage depending on speed grade"
This reverts commit d2099587d661c6ca2309256c0e04c06e26c8d34c.
According to TI changing the VDD_CORE while the SoC is running is not
allowed, the voltage must be set before the AM62 device reset is
released, revert this change therefore.
The correct solution would be to program the PMIC during manufactoring
according to the speed grade of the SoC.
Upstream-Status: Backport [ea7d3eec1e6e6541db68bf48a1314410e06cd9de]
Link: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1318338/am623-booting-from-mmc-failed-after-lowering-vdd_core-to-0-75v/5036508#5036508
Fixes: d2099587d661 ("board: verdin-am62: set cpu core voltage depending on speed grade")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Diffstat (limited to 'board/xes')
0 files changed, 0 insertions, 0 deletions