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authorJoe Hershberger <joe.hershberger@ni.com>2011-10-11 23:57:31 -0500
committerKim Phillips <kim.phillips@freescale.com>2011-11-03 18:27:56 -0500
commit2e651b248348e156d193e46f7a5b827d74af90d6 (patch)
tree76515fcf8008dbaefcdfdb6afffdb79376a82057 /board/ve8313
parent7d6a098219f8473ca4653cce5f7a49672b967f36 (diff)
mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code
Rename CONFIG_SYS_DDR_CONFIG to include which CS it is configuring Cleanup the setting of the csnbds to respect the setting of CONFIG_SYS_DDR_SDRAM_BASE Use __ilog2 instead of writing the code to compute it Disable unused CS configs Ensure ddrlaw.bar is configured Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/ve8313')
-rw-r--r--board/ve8313/ve8313.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c
index 166e459a390..924d8711230 100644
--- a/board/ve8313/ve8313.c
+++ b/board/ve8313/ve8313.c
@@ -65,8 +65,14 @@ static long fixed_sdram(void)
*/
__udelay(50000);
- out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24);
- out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CONFIG);
+#if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0)
+#warning Chip select bounds is only configurable in 16MB increments
+#endif
+ out_be32(&im->ddr.csbnds[0].csbnds,
+ ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) |
+ (((CONFIG_SYS_DDR_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) &
+ CSBNDS_EA));
+ out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG);
/* Currently we use only one CS, so disable the other bank. */
out_be32(&im->ddr.cs_config[1], 0);