diff options
author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-09-29 00:15:16 +0200 |
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committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-10-03 13:50:35 +0200 |
commit | 1b121c6ab548a9af0a27876e9eaa0c654c1dc3e1 (patch) | |
tree | 41f2cf6f761371430237357e43ae5304c11beba4 /board/toradex/apalis-tk1/apalis-tk1.c | |
parent | 118272010c367a7ef3060c5cb65fd402983d337e (diff) |
apalis-tk1: support v1.2 hardware revisionColibri-iMX7_LXDE-Image_2.7b4-20171005Colibri-iMX6_LXDE-Image_2.7b4-20171005Colibri-VF_LXDE-Image_2.7b4-20171005Colibri-T30_LXDE-Image_2.7b4-20171005Colibri-T20_LXDE-Image_2.7b4-20171005Apalis-iMX6_LXDE-Image_2.7b4-20171005Apalis-TK1_LXDE-Image_2.7b4-20171007Apalis-TK1-Mainline_LXDE-Image_2.7b4-20171005Apalis-T30_LXDE-Image_2.7b4-20171005
Support the V1.2 hardware revision with the following pin muxing
changes:
Ddc_scl_pv4 and ddc_sda_pv5 previously used as Apalis GPIO3 and GPIO4
are now used as DDC pins.
Gen2_i2c_scl_pt5 and gen2_i2c_sda_pt6 previously used as DDC pins are
now used as USB power enable signals.
Usb_vbus_en0_pn4 and usb_vbus_en1_pn5 previously used as USB power
enable signals are now used as GPIO3 and GPIO4.
Additionally a new device tree file tegra124-apalis-v1.2-eval.dtb is
loaded on V1.2 and later modules and resp. USB power enable signals
activated.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Diffstat (limited to 'board/toradex/apalis-tk1/apalis-tk1.c')
-rw-r--r-- | board/toradex/apalis-tk1/apalis-tk1.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c index 1c942bcf9d7..b70f5649e90 100644 --- a/board/toradex/apalis-tk1/apalis-tk1.c +++ b/board/toradex/apalis-tk1/apalis-tk1.c @@ -24,6 +24,10 @@ #define PEX_PERST_N TEGRA_GPIO(DD, 1) /* Apalis GPIO7 */ #define RESET_MOCI_CTRL TEGRA_GPIO(U, 4) #endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */ +#define VCC_USBH TEGRA_GPIO(T, 6) +#define VCC_USBH_V1_0 TEGRA_GPIO(N, 5) +#define VCC_USBO1 TEGRA_GPIO(T, 5) +#define VCC_USBO1_V1_0 TEGRA_GPIO(N, 4) int arch_misc_init(void) { @@ -33,6 +37,37 @@ int arch_misc_init(void) setenv("bootdelay", "-1"); } + /* PCB Version Indication: V1.2 and later have GPIO_PV0 wired to GND */ + gpio_request(TEGRA_GPIO(V, 0), "PCB Version Indication"); + gpio_direction_input(TEGRA_GPIO(V, 0)); + if (gpio_get_value(TEGRA_GPIO(V, 0))) { + /* + * if using the default device tree for new V1.2 and later HW, + * use version for older V1.0 and V1.1 HW + */ + char *fdt_env = getenv("fdt_module"); + if ((fdt_env != NULL) && (strcmp(FDT_MODULE, fdt_env) == 0)) { + setenv("fdt_module", FDT_MODULE_V1_0); + printf("patching fdt_module to " FDT_MODULE_V1_0 + " for older V1.0 and V1.1 HW\n"); +#ifndef CONFIG_ENV_IS_NOWHERE + saveenv(); +#endif + } + + /* activate USB power enable GPIOs */ + gpio_request(VCC_USBH_V1_0, "VCC_USBH"); + gpio_direction_output(VCC_USBH_V1_0, 1); + gpio_request(VCC_USBO1_V1_0, "VCC_USBO1"); + gpio_direction_output(VCC_USBO1_V1_0, 1); + } else { + /* activate USB power enable GPIOs */ + gpio_request(VCC_USBH, "VCC_USBH"); + gpio_direction_output(VCC_USBH, 1); + gpio_request(VCC_USBO1, "VCC_USBO1"); + gpio_direction_output(VCC_USBO1, 1); + } + return 0; } |