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authorSanthosh Kumar K <s-k6@ti.com>2024-02-14 16:27:50 +0530
committerFrancesco Dolcini <francesco.dolcini@toradex.com>2024-03-21 14:26:33 +0000
commit3cfe9a07ac5440934fd6ffcda5b5e2e51ef04fc9 (patch)
tree20fcc90c980368a49a2a3c086cc0367540cb1cf7 /board/ti/j721s2/evm.c
parent63587b060cf6c1b2191902da89807e0ee668f375 (diff)
board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled
As there are few redundant functions in board/ti/*/evm.c files, pull them to a common location of access to reuse and include the common file to access the functions. Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the device tree and resize the available amount of DDR, if ECC is enabled. Otherwise, fixup the device tree using the regular fdt_fixup_memory_banks(). Modify fixup_ddr_driver_for_ecc() to make the function agnostic to the number of DDR controllers present. Signed-off-by: Santhosh Kumar K <s-k6@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Diffstat (limited to 'board/ti/j721s2/evm.c')
-rw-r--r--board/ti/j721s2/evm.c31
1 files changed, 3 insertions, 28 deletions
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index eea2c256b3..3847587961 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -26,6 +26,7 @@
#include <dm/root.h>
#include "../common/board_detect.h"
+#include "../common/k3-ddr-init.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -34,17 +35,6 @@ int board_init(void)
return 0;
}
-int dram_init(void)
-{
-#ifdef CONFIG_PHYS_64BIT
- gd->ram_size = 0x100000000;
-#else
- gd->ram_size = 0x80000000;
-#endif
-
- return 0;
-}
-
phys_size_t board_get_usable_ram_top(phys_size_t total_size)
{
#ifdef CONFIG_PHYS_64BIT
@@ -56,23 +46,6 @@ phys_size_t board_get_usable_ram_top(phys_size_t total_size)
return gd->ram_top;
}
-int dram_init_banksize(void)
-{
- /* Bank 0 declares the memory available in the DDR low region */
- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
- gd->bd->bi_dram[0].size = 0x7fffffff;
- gd->ram_size = 0x80000000;
-
-#ifdef CONFIG_PHYS_64BIT
- /* Bank 1 declares the memory available in the DDR high region */
- gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
- gd->bd->bi_dram[1].size = 0x37fffffff;
- gd->ram_size = 0x400000000;
-#endif
-
- return 0;
-}
-
/* Enables the spi-nand dts node, if onboard mux is set to spinand */
static void __maybe_unused detect_enable_spinand(void *blob)
{
@@ -108,6 +81,8 @@ static void __maybe_unused detect_enable_spinand(void *blob)
void spl_perform_fixups(struct spl_image_info *spl_image)
{
detect_enable_spinand(spl_image->fdt_addr);
+ if (IS_ENABLED(CONFIG_K3_INLINE_ECC))
+ fixup_ddr_driver_for_ecc(spl_image);
}
#endif