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authorEmanuele Ghidoli <emanuele.ghidoli@toradex.com>2024-04-10 11:58:31 +0200
committerEmanuele Ghidoli <emanuele.ghidoli@toradex.com>2024-04-25 10:16:25 +0200
commit3c1274e4347c1326f61191808aa2d3139e6007cd (patch)
tree7da2e981cb663f966138a736a5f349bba1cdce72 /board/ti/j721e/evm.c
parentf5306ddb679bfa530f2049059295f3dcf05b4107 (diff)
arm: k3: j784s4: Fix call to spl_enable_dcache by calling spl_enable_cache
Since commit [1] spl_enable_dcache is no more available and, at the same time, by enabling instruction cache, boot time is reduced. [1] 536d0d5eef24 ("arm: k3: Enable instruction cache for main domain SPL") Upstream-Status: Inappropriate Commit [1] is already upstreamed. am62p5 and j784s4 were introduced afterwards and they are using the new function. Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Diffstat (limited to 'board/ti/j721e/evm.c')
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