diff options
| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2018-02-28 20:51:56 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-04-03 12:11:48 +0200 |
| commit | 136e32593335e031558a573158b6180fc80b551f (patch) | |
| tree | 7b1bb16056840f2729ec98b963fb4cec36ecc51e /board/sunxi | |
| parent | 6ddbb1e936c78cdef1e7395039fa7020c5c75326 (diff) | |
sunxi: spl: remove DMA related settings of the NAND controller
Code has been changed to do not use DMA anymore with the NAND
controller, instead PIO is used. Then, DMA-specific initialization may
be dropped.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'board/sunxi')
| -rw-r--r-- | board/sunxi/board.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/board/sunxi/board.c b/board/sunxi/board.c index ee3bfdac6d..322dd9e23a 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -290,11 +290,6 @@ static void nand_clock_setup(void) defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0)); #endif -#ifdef CONFIG_MACH_SUN9I - setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA)); -#else - setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA)); -#endif setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1); } |