diff options
author | Markus Klotzbuecher <mk@denx.de> | 2008-10-21 09:18:01 +0200 |
---|---|---|
committer | Markus Klotzbuecher <mk@denx.de> | 2008-10-21 09:18:01 +0200 |
commit | 50bd0057ba8fceeb48533f8b1a652ccd0e170838 (patch) | |
tree | ea1a183343573c2a48248923b96d316c0956727c /board/siemens/SCM | |
parent | 9dbc366744960013965fce8851035b6141f3b3ae (diff) | |
parent | f82642e33899766892499b163e60560fbbf87773 (diff) |
Merge git://git.denx.de/u-boot into x1
Conflicts:
drivers/usb/usb_ohci.c
Diffstat (limited to 'board/siemens/SCM')
-rw-r--r-- | board/siemens/SCM/config.mk | 2 | ||||
-rw-r--r-- | board/siemens/SCM/flash.c | 16 | ||||
-rw-r--r-- | board/siemens/SCM/fpga_scm.c | 14 | ||||
-rw-r--r-- | board/siemens/SCM/scm.c | 74 |
4 files changed, 53 insertions, 53 deletions
diff --git a/board/siemens/SCM/config.mk b/board/siemens/SCM/config.mk index 855ae38f817..5d0898be6df 100644 --- a/board/siemens/SCM/config.mk +++ b/board/siemens/SCM/config.mk @@ -25,7 +25,7 @@ # Siemens SCM boards # -# This should be equal to the CFG_FLASH_BASE define in config_SCM.h +# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_SCM.h # for the "final" configuration, with U-Boot in flash, or the address # in RAM where U-Boot is loaded at for debugging. # diff --git a/board/siemens/SCM/flash.c b/board/siemens/SCM/flash.c index 500af923ac3..4a6d5382bed 100644 --- a/board/siemens/SCM/flash.c +++ b/board/siemens/SCM/flash.c @@ -31,7 +31,7 @@ #define V_BYTE(a) (*(volatile unsigned char *)( a )) -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /*----------------------------------------------------------------------- @@ -185,13 +185,13 @@ unsigned long flash_init (void) int i; /* Init: no FLASHes known */ - for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; } /* Static FLASH Bank configuration here (only one bank) */ - size_b0 = flash_get_size (CFG_FLASH0_BASE, &flash_info[0]); + size_b0 = flash_get_size (CONFIG_SYS_FLASH0_BASE, &flash_info[0]); if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) { printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", size_b0, size_b0 >> 20); @@ -201,10 +201,10 @@ unsigned long flash_init (void) * protect monitor and environment sectors */ -#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH0_BASE flash_protect (FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]); + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]); #endif #if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) @@ -364,7 +364,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) while ((V_ULONG (info->start[l_sect]) & 0x00800080) != 0x00800080 || (V_ULONG (info->start[l_sect] + 4) & 0x00800080) != 0x00800080) { - if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return 1; } @@ -480,7 +480,7 @@ static int write_dword (flash_info_t * info, ulong dest, unsigned char *pdata) start = get_timer (0); while (((V_ULONG (dest) & 0x00800080) != (ch & 0x00800080)) || ((V_ULONG (dest + 4) & 0x00800080) != (cl & 0x00800080))) { - if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { return (1); } } diff --git a/board/siemens/SCM/fpga_scm.c b/board/siemens/SCM/fpga_scm.c index 661bf66c66c..acd9c1570fc 100644 --- a/board/siemens/SCM/fpga_scm.c +++ b/board/siemens/SCM/fpga_scm.c @@ -28,18 +28,18 @@ #include "../common/fpga.h" fpga_t fpga_list[] = { - {"FIOX", CFG_FIOX_BASE, - CFG_PD_FIOX_INIT, CFG_PD_FIOX_PROG, CFG_PD_FIOX_DONE} + {"FIOX", CONFIG_SYS_FIOX_BASE, + CONFIG_SYS_PD_FIOX_INIT, CONFIG_SYS_PD_FIOX_PROG, CONFIG_SYS_PD_FIOX_DONE} , - {"FDOHM", CFG_FDOHM_BASE, - CFG_PD_FDOHM_INIT, CFG_PD_FDOHM_PROG, CFG_PD_FDOHM_DONE} + {"FDOHM", CONFIG_SYS_FDOHM_BASE, + CONFIG_SYS_PD_FDOHM_INIT, CONFIG_SYS_PD_FDOHM_PROG, CONFIG_SYS_PD_FDOHM_DONE} }; int fpga_count = sizeof (fpga_list) / sizeof (fpga_t); ulong fpga_control (fpga_t * fpga, int cmd) { - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; switch (cmd) { case FPGA_INIT_IS_HIGH: @@ -74,11 +74,11 @@ ulong fpga_control (fpga_t * fpga, int cmd) break; case FPGA_GET_ID: - if (fpga->conf_base == CFG_FIOX_BASE) { + if (fpga->conf_base == CONFIG_SYS_FIOX_BASE) { ulong ver = *(volatile ulong *) (fpga->conf_base + 0x10); return ((ver >> 10) & 0xf) + ((ver >> 2) & 0xf0); - } else if (fpga->conf_base == CFG_FDOHM_BASE) { + } else if (fpga->conf_base == CONFIG_SYS_FDOHM_BASE) { return (*(volatile ushort *) fpga->conf_base) & 0xff; } else { return *(volatile ulong *) fpga->conf_base; diff --git a/board/siemens/SCM/scm.c b/board/siemens/SCM/scm.c index 6a9dd25835a..e0611fe370d 100644 --- a/board/siemens/SCM/scm.c +++ b/board/siemens/SCM/scm.c @@ -249,7 +249,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, */ maxsize = (1 + (~orx | 0x7fff)) / 2; - /* Since CFG_SDRAM_BASE is always 0 (??), we assume that + /* Since CONFIG_SYS_SDRAM_BASE is always 0 (??), we assume that * we are configuring CS1 if base != 0 */ sdmr_ptr = base ? &memctl->memc_lsdmr : &memctl->memc_psdmr; @@ -274,7 +274,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, * accessing the SDRAM with a single-byte transaction." * * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. + * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. */ *sdmr_ptr = sdmr | PSDMR_OP_PREA; @@ -285,7 +285,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, *base = c; *sdmr_ptr = sdmr | PSDMR_OP_MRW; - *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */ + *(base + CONFIG_SYS_MRS_OFFS) = c; /* setting MR on address lines */ *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN; *base = c; @@ -308,10 +308,10 @@ int power_on_reset (void) phys_size_t initdram (int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT long size8, size9; #endif long psize, lsize; @@ -319,8 +319,8 @@ phys_size_t initdram (int board_type) psize = 16 * 1024 * 1024; lsize = 0; - memctl->memc_psrt = CFG_PSRT; - memctl->memc_mptpr = CFG_MPTPR; + memctl->memc_psrt = CONFIG_SYS_PSRT; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; #if 0 /* Just for debugging */ #define prt_br_or(brX,orX) do { \ @@ -338,37 +338,37 @@ phys_size_t initdram (int board_type) prt_br_or (br3, or3); #endif -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT /* 60x SDRAM setup: */ - size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR1_8COL, - (uchar *) CFG_SDRAM_BASE); - size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR1_9COL, - (uchar *) CFG_SDRAM_BASE); + size8 = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR1_8COL, + (uchar *) CONFIG_SYS_SDRAM_BASE); + size9 = try_init (memctl, CONFIG_SYS_PSDMR_9COL, CONFIG_SYS_OR1_9COL, + (uchar *) CONFIG_SYS_SDRAM_BASE); if (size8 < size9) { psize = size9; printf ("(60x:9COL - %ld MB, ", psize >> 20); } else { - psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR1_8COL, - (uchar *) CFG_SDRAM_BASE); + psize = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR1_8COL, + (uchar *) CONFIG_SYS_SDRAM_BASE); printf ("(60x:8COL - %ld MB, ", psize >> 20); } /* Local SDRAM setup: */ -#ifdef CFG_INIT_LOCAL_SDRAM - memctl->memc_lsrt = CFG_LSRT; - size8 = try_init (memctl, CFG_LSDMR_8COL, CFG_OR2_8COL, +#ifdef CONFIG_SYS_INIT_LOCAL_SDRAM + memctl->memc_lsrt = CONFIG_SYS_LSRT; + size8 = try_init (memctl, CONFIG_SYS_LSDMR_8COL, CONFIG_SYS_OR2_8COL, (uchar *) SDRAM_BASE2_PRELIM); - size9 = try_init (memctl, CFG_LSDMR_9COL, CFG_OR2_9COL, + size9 = try_init (memctl, CONFIG_SYS_LSDMR_9COL, CONFIG_SYS_OR2_9COL, (uchar *) SDRAM_BASE2_PRELIM); if (size8 < size9) { lsize = size9; printf ("Local:9COL - %ld MB) using ", lsize >> 20); } else { - lsize = try_init (memctl, CFG_LSDMR_8COL, CFG_OR2_8COL, + lsize = try_init (memctl, CONFIG_SYS_LSDMR_8COL, CONFIG_SYS_OR2_8COL, (uchar *) SDRAM_BASE2_PRELIM); printf ("Local:8COL - %ld MB) using ", lsize >> 20); } @@ -377,11 +377,11 @@ phys_size_t initdram (int board_type) /* Set up BR2 so that the local SDRAM goes * right after the 60x SDRAM */ - memctl->memc_br2 = (CFG_BR2_PRELIM & ~BRx_BA_MSK) | - (CFG_SDRAM_BASE + psize); + memctl->memc_br2 = (CONFIG_SYS_BR2_PRELIM & ~BRx_BA_MSK) | + (CONFIG_SYS_SDRAM_BASE + psize); #endif -#endif /* CFG_INIT_LOCAL_SDRAM */ -#endif /* CFG_RAMBOOT */ +#endif /* CONFIG_SYS_INIT_LOCAL_SDRAM */ +#endif /* CONFIG_SYS_RAMBOOT */ icache_enable (); @@ -394,17 +394,17 @@ phys_size_t initdram (int board_type) static void config_scoh_cs (void) { - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immr->im_memctl; - volatile can_reg_t *can = (volatile can_reg_t *) CFG_CAN0_BASE; + volatile can_reg_t *can = (volatile can_reg_t *) CONFIG_SYS_CAN0_BASE; volatile uint tmp, i; /* Initialize OR3 / BR3 for CAN Bus Controller 0 */ - memctl->memc_or3 = CFG_CAN0_OR3; - memctl->memc_br3 = CFG_CAN0_BR3; + memctl->memc_or3 = CONFIG_SYS_CAN0_OR3; + memctl->memc_br3 = CONFIG_SYS_CAN0_BR3; /* Initialize OR4 / BR4 for CAN Bus Controller 1 */ - memctl->memc_or4 = CFG_CAN1_OR4; - memctl->memc_br4 = CFG_CAN1_BR4; + memctl->memc_or4 = CONFIG_SYS_CAN1_OR4; + memctl->memc_br4 = CONFIG_SYS_CAN1_BR4; /* Initialize MAMR to write in the array at address 0x0 */ memctl->memc_mamr = 0x00 | MxMR_OP_WARR | MxMR_GPL_x4DIS; @@ -487,19 +487,19 @@ static void config_scoh_cs (void) /* Initialize OR5 / BR5 for the extended EEPROM Bank0 */ - memctl->memc_or5 = CFG_EXTPROM_OR5; - memctl->memc_br5 = CFG_EXTPROM_BR5; + memctl->memc_or5 = CONFIG_SYS_EXTPROM_OR5; + memctl->memc_br5 = CONFIG_SYS_EXTPROM_BR5; /* Initialize OR6 / BR6 for the extended EEPROM Bank1 */ - memctl->memc_or6 = CFG_EXTPROM_OR6; - memctl->memc_br6 = CFG_EXTPROM_BR6; + memctl->memc_or6 = CONFIG_SYS_EXTPROM_OR6; + memctl->memc_br6 = CONFIG_SYS_EXTPROM_BR6; /* Initialize OR7 / BR7 for the Glue Logic */ - memctl->memc_or7 = CFG_FIOX_OR7; - memctl->memc_br7 = CFG_FIOX_BR7; + memctl->memc_or7 = CONFIG_SYS_FIOX_OR7; + memctl->memc_br7 = CONFIG_SYS_FIOX_BR7; /* Initialize OR8 / BR8 for the DOH Logic */ - memctl->memc_or8 = CFG_FDOHM_OR8; - memctl->memc_br8 = CFG_FDOHM_BR8; + memctl->memc_or8 = CONFIG_SYS_FDOHM_OR8; + memctl->memc_br8 = CONFIG_SYS_FDOHM_BR8; DEBUGF ("OR0 %08x BR0 %08x\n", memctl->memc_or0, memctl->memc_br0); DEBUGF ("OR1 %08x BR1 %08x\n", memctl->memc_or1, memctl->memc_br1); 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