diff options
| author | Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | 2014-03-31 14:14:25 +0900 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2014-04-28 04:35:12 +0900 |
| commit | 2c2c6ba6c653e21f762b57017f83eed114bd3b24 (patch) | |
| tree | a2b2406aea6edbed6659dbb65d339b699bc60d1f /board/renesas/lager | |
| parent | b1f78a2ebd558c175c307110c50835a92c5a9db5 (diff) | |
arm: rmobile: lager: Change to maximum CPU frequency
Maximum CPU clock of R8A7790 that are used in lager board is 1.4GHz.
This change to use the maximum clock in this board.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'board/renesas/lager')
| -rw-r--r-- | board/renesas/lager/lager.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 959f46ac33..898fb5767e 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -24,15 +24,21 @@ DECLARE_GLOBAL_DATA_PTR; +#define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) { struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; + u32 stc; /* Watchdog init */ writel(0xA5A5A500, &rwdt->rwtcsra); writel(0xA5A5A500, &swdt->swtcsra); + /* CPU frequency setting. Set to 1.4GHz */ + stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT; + clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); + /* QoS(Quality-of-Service) Init */ qos_init(); } |