diff options
| author | Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> | 2016-03-30 10:56:21 +0900 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-10-18 19:07:46 +0200 |
| commit | 6f5658219886961afeacfc4af3a9eef31e36e2a9 (patch) | |
| tree | 705a45e50e2b82498ef958394c8e2933153698fc /board/renesas/eagle | |
| parent | 44c56bf8248478f4d33be5b51337f9b340f47ab7 (diff) | |
ARM: rmobile: Remove TMU0/TMU1 settings on Gen3
U-Boot uses ARM generic timer, TMU0 and TMU1 are not used, remove them.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Diffstat (limited to 'board/renesas/eagle')
| -rw-r--r-- | board/renesas/eagle/eagle.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c index 9317410071..0e5efea19d 100644 --- a/board/renesas/eagle/eagle.c +++ b/board/renesas/eagle/eagle.c @@ -50,17 +50,12 @@ void s_init(void) clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); } -#define TMU0_MSTP125 BIT(25) /* secure */ - int board_early_init_f(void) { /* Unlock CPG access */ writel(0xA5A5FFFF, CPGWPR); writel(0x5A5A0000, CPGWPCR); - /* TMU0 */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); - return 0; } |