diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2012-01-03 15:04:40 +0530 |
|---|---|---|
| committer | Gerrit <chrome-bot@google.com> | 2012-02-14 22:03:49 -0800 |
| commit | f8cc6a4a71cb1ccba84977f0762eefbc960091f4 (patch) | |
| tree | 0c28785a6fbed4277223d5882d92c7e8ffc5db8d /board/nvidia | |
| parent | debacb801479e992807f7e0d81f52932b0d7e9a2 (diff) | |
arm: tegra2: split LP0 code to help future chips
split the LP0 code for tegra2 into common
LP0 code and chip specific warm boot code
BUG=chromium-os:23496
TEST=build for Seaboard
Change-Id: Ie04bf9ac17482a37afd0f4515dc3aafeb4f48ae7
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/15883
Diffstat (limited to 'board/nvidia')
| -rw-r--r-- | board/nvidia/common/Makefile | 4 | ||||
| -rw-r--r-- | board/nvidia/common/board.c | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/board/nvidia/common/Makefile b/board/nvidia/common/Makefile index cd821ebb072..48d04b494d5 100644 --- a/board/nvidia/common/Makefile +++ b/board/nvidia/common/Makefile @@ -31,8 +31,8 @@ COBJS-$(CONFIG_SPI_UART_SWITCH) += uart-spi-fix.o COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o COBJS-$(CONFIG_TEGRA_PMU) += pmu.o COBJS-$(CONFIG_TEGRA_KEYBOARD) += generic_kbc.o -COBJS-$(CONFIG_TEGRA2_LP0) += crypto/aes_ref.o -COBJS-$(CONFIG_TEGRA2_LP0) += crypto/crypto.o +COBJS-$(CONFIG_TEGRA_LP0) += crypto/aes_ref.o +COBJS-$(CONFIG_TEGRA_LP0) += crypto/crypto.o COBJS-$(CONFIG_TEGRA2_NAND) += tegra2_nand.o COBJS := $(COBJS-y) diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 4e517deda86..5cb219b4f92 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -346,7 +346,7 @@ int board_init(void) board_emc_init(); #endif -#ifdef CONFIG_TEGRA2_LP0 +#ifdef CONFIG_TEGRA_LP0 /* prepare the WB code to LP0 location */ warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); #endif |