diff options
author | Simon Glass <sjg@chromium.org> | 2011-10-03 13:33:51 -0700 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2011-10-06 19:24:58 -0700 |
commit | 9eddab44e6e5e8875094b4e0827596b2fe5ab61d (patch) | |
tree | 9b58d811f2e0bc42b52c0f4c9c8a11fcbb7345c0 /board/nvidia | |
parent | 5605de2e1851d005c226643af2040bffca9c6c39 (diff) |
tegra: Add support for 408MHz PLLP
The 216MHz PLLP is not always wanted - this adds support for 408MHz which
will be used on T30.
BUG=chromium-os:19004
TEST=build and boot on Seaboard
Change-Id: I4c053b5a9db4efb7b926ad2c9072f392d24033c9
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: http://gerrit.chromium.org/gerrit/8689
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Diffstat (limited to 'board/nvidia')
-rw-r--r-- | board/nvidia/common/board.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 193ea2ed03..c29eba73b9 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -365,6 +365,13 @@ int tegra_get_chip_type(void) case SKU_ID_AP25E: case SKU_ID_T25E: return TEGRA_SOC_T25; + case SKU_ID_T30: +#ifdef CONFIG_SYS_PLLP_BASE_IS_408MHZ + return TEGRA_SOC_T30_408MHZ; +#else + return TEGRA_SOC_T30; +#endif + default: /* unknown sku id */ return TEGRA_SOC_UNKNOWN; |