diff options
author | Rong Chang <rongchang@chromium.org> | 2011-07-19 20:13:34 +0800 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2011-08-29 10:59:01 -0700 |
commit | 0fd5ffbd8df18f5552c18756314e0d69b732643c (patch) | |
tree | 3239d39d85daf05808eed84bb0bf9946b0cf5936 /board/nvidia/seaboard | |
parent | f771480b4ce71d9863f8b6f87abe571b3209f97d (diff) |
CHROMIUM: arm: fdt: config: Fix write protect polarity config
BUG=chrome-os-partner:4781
TEST=Check crossystem wpsw_boot and wpsw_cur
Change-Id: I1dc1a7cd3c92373765d2128c4b61d415d8b87004
Reviewed-on: http://gerrit.chromium.org/gerrit/4305
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Diffstat (limited to 'board/nvidia/seaboard')
-rw-r--r-- | board/nvidia/seaboard/tegra2-aebl.dts | 2 | ||||
-rw-r--r-- | board/nvidia/seaboard/tegra2-kaen.dts | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/board/nvidia/seaboard/tegra2-aebl.dts b/board/nvidia/seaboard/tegra2-aebl.dts index ae635d97506..9967ff6bec4 100644 --- a/board/nvidia/seaboard/tegra2-aebl.dts +++ b/board/nvidia/seaboard/tegra2-aebl.dts @@ -20,7 +20,7 @@ gpio_port_developer_switch = <168>; /* GPIO polarity: 0=active_low, 1=active_high */ - polarity_write_protect_switch = <1>; + polarity_write_protect_switch = <0>; polarity_recovery_switch = <0>; polarity_developer_switch = <1>; }; diff --git a/board/nvidia/seaboard/tegra2-kaen.dts b/board/nvidia/seaboard/tegra2-kaen.dts index 179a2184e5e..f1b9f876fc7 100644 --- a/board/nvidia/seaboard/tegra2-kaen.dts +++ b/board/nvidia/seaboard/tegra2-kaen.dts @@ -20,7 +20,7 @@ gpio_port_developer_switch = <168>; /* GPIO polarity: 0=active_low, 1=active_high */ - polarity_write_protect_switch = <1>; + polarity_write_protect_switch = <0>; polarity_recovery_switch = <0>; polarity_developer_switch = <1>; }; |