CHROMIUM: refactor GPIO interface

BUG=chromium-os:17424
TEST=boot on Seaboard

Change-Id: I9b1f42801eedfba5e7f4e85a5b3ac1e1c106b6bf
Reviewed-on: http://gerrit.chromium.org/gerrit/3998
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Tested-by: Che-Liang Chiou <clchiou@chromium.org>

3 files changed, 80 insertions, 89 deletions

diff --git a/board/nvidia/chromeos/Makefile b/board/nvidia/chromeos/Makefile
index 29da6fd817..daf13f3f5c 100644
--- a/board/nvidia/chromeos/Makefile
+++ b/board/nvidia/chromeos/Makefile
@@ -3,32 +3,6 @@
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 #
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met:
-#
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above
-# copyright notice, this list of conditions and the following disclaimer
-# in the documentation and/or other materials provided with the
-# distribution.
-# * Neither the name of Google Inc. nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
 # Alternatively, this software may be distributed under the terms of the
 # GNU General Public License ("GPL") version 2 as published by the Free
 # Software Foundation.
@@ -38,7 +12,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)libchromeos_hardware_interface.a
 
-COBJS-$(CONFIG_CHROMEOS) += gpio.o
+COBJS-$(CONFIG_CHROMEOS) += cros_gpio.o
 COBJS-$(CONFIG_CHROMEOS) += power_management.o
 
 COBJS-$(CONFIG_CHROMEOS_ONESTOP) += onestop_board_specific.o
diff --git a/board/nvidia/chromeos/cros_gpio.c b/board/nvidia/chromeos/cros_gpio.c
new file mode 100644
index 0000000000..f158c5602b
--- /dev/null
+++ b/board/nvidia/chromeos/cros_gpio.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ */
+
+/* Implementation of per-board GPIO accessor functions */
+
+#include <common.h>
+#include <fdt_decode.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/tegra2.h>
+#include <chromeos/common.h>
+#include <chromeos/cros_gpio.h>
+
+#define PREFIX "cros_gpio: "
+
+int cros_gpio_fetch(enum cros_gpio_index index, const void *fdt,
+		cros_gpio_t *gpio)
+{
+	const char const *port[3] = {
+		"gpio_port_write_protect_switch",
+		"gpio_port_recovery_switch",
+		"gpio_port_developer_switch"
+	};
+	const int const default_port[3] = {
+		GPIO_PH3,
+		GPIO_PH0,
+		GPIO_PV0
+	};
+	const char const *polarity[3] = {
+		"polarity_write_protect_switch",
+		"polarity_recovery_switch",
+		"polarity_developer_switch",
+	};
+	int p;
+
+	if (index < 0 || index >= CROS_GPIO_MAX_GPIO) {
+		VBDEBUG(PREFIX "index out of range: %d\n", index);
+		return -1;
+	}
+
+	gpio->index = index;
+
+	gpio->port = fdt_decode_get_config_int(fdt,
+			port[index], default_port[index]);
+
+	gpio_direction_input(gpio->port);
+
+	gpio->polarity = fdt_decode_get_config_int(fdt,
+			polarity[index], CROS_GPIO_ACTIVE_HIGH);
+
+	p = (gpio->polarity == CROS_GPIO_ACTIVE_HIGH) ? 0 : 1;
+	gpio->value = p ^ gpio_get_value(gpio->port);
+
+	return 0;
+}
+
+int cros_gpio_dump(cros_gpio_t *gpio)
+{
+	const char const *name[3] = {
+		"wpsw", "recsw", "devsw"
+	};
+	int index = gpio->index;
+
+	if (index < 0 || index >= CROS_GPIO_MAX_GPIO) {
+		VBDEBUG(PREFIX "index out of range: %d\n", index);
+		return -1;
+	}
+
+	VBDEBUG(PREFIX "%-6s: port=%3d, polarity=%d, value=%d\n",
+			name[gpio->index],
+			gpio->port, gpio->polarity, gpio->value);
+	return 0;
+}
diff --git a/board/nvidia/chromeos/gpio.c b/board/nvidia/chromeos/gpio.c
deleted file mode 100644
index 44d6b3840e..0000000000
--- a/board/nvidia/chromeos/gpio.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Alternatively, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") version 2 as published by the Free
- * Software Foundation.
- */
-
-/* Implementation of per-board GPIO accessor functions */
-
-#include <common.h>
-#include <fdt_decode.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/tegra2.h>
-#include <chromeos/common.h>
-#include <chromeos/gpio.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static struct {
-	int wpsw, recsw, devsw;
-} gpio_port;
-
-static void init_gpio_port(void)
-{
-	gpio_port.wpsw = fdt_decode_get_config_int(gd->blob,
-			"gpio_port_write_protect_switch", GPIO_PH3);
-	gpio_port.recsw = fdt_decode_get_config_int(gd->blob,
-			"gpio_port_recovery_switch", GPIO_PH0);
-	gpio_port.devsw = fdt_decode_get_config_int(gd->blob,
-			"gpio_port_developer_switch", GPIO_PV0);
-}
-
-static int read_gpio(enum polarity polarity, int gpio)
-{
-	int pol = (polarity == GPIO_ACTIVE_HIGH) ? 0 : 1;
-	gpio_direction_input(gpio);
-	return pol ^ gpio_get_value(gpio);
-}
-
-int is_firmware_write_protect_gpio_asserted(enum polarity polarity)
-{
-	if (!gpio_port.wpsw)
-		init_gpio_port();
-	return read_gpio(polarity, GPIO_PH3);
-}
-
-int is_recovery_mode_gpio_asserted(enum polarity polarity)
-{
-	if (!gpio_port.wpsw)
-		init_gpio_port();
-	return read_gpio(polarity, GPIO_PH0);
-}
-
-int is_developer_mode_gpio_asserted(enum polarity polarity)
-{
-	if (!gpio_port.wpsw)
-		init_gpio_port();
-	return read_gpio(polarity, GPIO_PV0);
-}