diff options
author | wdenk <wdenk> | 2003-06-04 15:05:30 +0000 |
---|---|---|
committer | wdenk <wdenk> | 2003-06-04 15:05:30 +0000 |
commit | f3e0de60a6dfa2bedd99bda257841a22b5153f42 (patch) | |
tree | 0dde9b4b5335d5889587fc19f7870db1034b636e /board/mpl/common | |
parent | 682011ff6968198da14b89e40d9f55b00f6d91f7 (diff) |
* Patch by Denis Peter, 04 June 2003:
add support for the MIP405T board
Diffstat (limited to 'board/mpl/common')
-rw-r--r-- | board/mpl/common/common_util.c | 22 | ||||
-rw-r--r-- | board/mpl/common/pci_parts.h | 6 |
2 files changed, 26 insertions, 2 deletions
diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c index 48ffbee5062..aa2ba6f04c3 100644 --- a/board/mpl/common/common_util.c +++ b/board/mpl/common/common_util.c @@ -59,6 +59,7 @@ int mpl_prg(unsigned long src,unsigned long size) flash_info_t *info; int i,rc; #if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) + char *copystr = (char *)src; unsigned long *magic = (unsigned long *)src; #endif @@ -69,8 +70,25 @@ int mpl_prg(unsigned long src,unsigned long size) printf("Bad Magic number\n"); return -1; } - - start = 0 - size; + /* some more checks before we delete the Flash... */ + /* Checking the ISO_STRING prevents to program a + * wrong Firmware Image into the flash. + */ + i=4; /* skip Magic number */ + while(1) { + if(strncmp(©str[i],"MEV-",4)==0) + break; + if(i++>=0x100) { + printf("Firmware Image for unknown Target\n"); + return -1; + } + } + /* we have the ISO STRING, check */ + if(strncmp(©str[i],CONFIG_ISO_STRING,sizeof(CONFIG_ISO_STRING)-1)!=0) { + printf("Wrong Firmware Image: %s\n",©str[i]); + return -1; + } + start = 0 - size; for(i=info->sector_count-1;i>0;i--) { info->protect[i] = 0; /* unprotect this sector */ diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h index 944585f356a..a8e3232fc05 100644 --- a/board/mpl/common/pci_parts.h +++ b/board/mpl/common/pci_parts.h @@ -108,17 +108,23 @@ static struct pci_pip405_config_entry piix4_isa_bridge_f0[] = { /* PIIX4 IDE Controller Function 1 */ static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = { {PCI_COMMAND, 0x0001, 2}, /* enable IO access */ +#if !defined(CONFIG_MIP405T) {PCI_CFG_PIIX4_IDETIM, 0x80008000, 4}, /* enable Both IDE channels */ +#else + {PCI_CFG_PIIX4_IDETIM, 0x80000000, 4}, /* enable IDE channel0 */ +#endif { } /* end of device table */ }; /* PIIX4 USB Controller Function 2 */ static struct pci_pip405_config_entry piix4_usb_cntrl_f2[] = { +#if !defined(CONFIG_MIP405T) {PCI_INTERRUPT_LINE, 31, 1}, /* Int vector = 31 */ {PCI_BASE_ADDRESS_4, 0x0000E001, 4}, /* Set IO Address to 0xe000 to 0xe01F */ {PCI_LATENCY_TIMER, 0x80, 1}, /* Latency Timer 0x80 */ {0xC0, 0x2000, 2}, /* Legacy support */ {PCI_COMMAND, 0x0005, 2}, /* enable IO access and Master */ +#endif { } /* end of device table */ }; |