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authorwdenk <wdenk>2003-12-07 18:32:37 +0000
committerwdenk <wdenk>2003-12-07 18:32:37 +0000
commita2663ea4fc9d18cb8000c97ed92c3c668eda8e04 (patch)
tree9eb328b497d6f482e5571635fa00b1d0cae5b185 /board/mpl/common/flash.c
parentef5a9672c778e22ecb522db625b5df78ea40ed23 (diff)
* Patches by David Müller, 14 Nov 2003:
- board/mpl/common/common_util.c * implement support for BZIP2 compressed images * various cleanups (printf -> puts, ...) - board/mpl/common/flash.c * report correct errors to upper layers * check the erase fail and VPP low bits in status reg - board/mpl/vcma9/cmd_vcma9.c - board/mpl/vcma9/flash.c * various cleanups (printf -> puts, ...) - common/cmd_usb.c * fix typo in comment - cpu/arm920t/usb_ohci.c * support for S3C2410 is missing in #if line - drivers/cs8900.c * reinit some registers in case of error (cable missing, ...) - fs/fat/fat.c * support for USB/MMC devices is missing in #if line - include/configs/MIP405.h - include/configs/PIP405.h * enable BZIP2 support * enlarge malloc space to 1MiB because of BZIP2 support - include/configs/VCMA9.h * enable BZIP2 support * enlarge malloc space to 1MiB because of BZIP2 support * enable USB support - lib_arm/armlinux.c * change calling convention of ARM Linux kernel as described on http://www.arm.linux.org.uk/developer/booting.php * Patch by Thomas Lange, 14 Nov 2003: Split dbau1x00 into dbau1000, dbau1100 and dbau1500 configs to support all these AMD boards. * Patch by Thomas Lange, 14 Nov 2003: Workaround for mips au1x00 physical memory accesses (the au1x00 uses a 36 bit bus internally and cannot access physical memory directly. Use the uncached SDRAM address instead of the physical one.)
Diffstat (limited to 'board/mpl/common/flash.c')
-rw-r--r--board/mpl/common/flash.c29
1 files changed, 17 insertions, 12 deletions
diff --git a/board/mpl/common/flash.c b/board/mpl/common/flash.c
index e56e307160..5f50200b26 100644
--- a/board/mpl/common/flash.c
+++ b/board/mpl/common/flash.c
@@ -543,7 +543,7 @@ int wait_for_DQ7(flash_info_t *info, int sect)
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
- return -1;
+ return ERR_TIMOUT;
}
/* show that we're waiting */
if ((now - last) > 1000) { /* every second */
@@ -551,12 +551,12 @@ int wait_for_DQ7(flash_info_t *info, int sect)
last = now;
}
}
- return 0;
+ return ERR_OK;
}
int intel_wait_for_DQ7(flash_info_t *info, int sect)
{
- ulong start, now, last;
+ ulong start, now, last, status;
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
start = get_timer (0);
@@ -564,7 +564,7 @@ int intel_wait_for_DQ7(flash_info_t *info, int sect)
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
- return -1;
+ return ERR_TIMOUT;
}
/* show that we're waiting */
if ((now - last) > 1000) { /* every second */
@@ -572,8 +572,11 @@ int intel_wait_for_DQ7(flash_info_t *info, int sect)
last = now;
}
}
- addr[0]=(FLASH_WORD_SIZE)0x00500050;
- return 0;
+ status = addr[0] & (FLASH_WORD_SIZE)0x00280028;
+ /* clear status register */
+ addr[0] = (FLASH_WORD_SIZE)0x00500050;
+ /* check status for block erase fail and VPP low */
+ return (status == 0 ? ERR_OK : ERR_NOT_ERASED);
}
/*-----------------------------------------------------------------------
@@ -584,7 +587,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
volatile FLASH_WORD_SIZE *addr2;
int flag, prot, sect, l_sect;
- int i;
+ int i, rcode = 0;
if ((s_first < 0) || (s_first > s_last)) {
@@ -634,7 +637,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
for (i=0; i<50; i++)
udelay(1000); /* wait 1 ms */
- wait_for_DQ7(info, sect);
+ rcode |= wait_for_DQ7(info, sect);
}
else {
if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
@@ -643,7 +646,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
intel_wait_for_DQ7(info, sect);
addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
- intel_wait_for_DQ7(info, sect);
+ rcode |= intel_wait_for_DQ7(info, sect);
}
else {
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
@@ -652,7 +655,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
- wait_for_DQ7(info, sect);
+ rcode |= wait_for_DQ7(info, sect);
}
}
l_sect = sect;
@@ -688,8 +691,10 @@ DONE:
addr = (FLASH_WORD_SIZE *)info->start[0];
addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
- printf (" done\n");
- return 0;
+ if (!rcode)
+ printf (" done\n");
+
+ return rcode;
}