diff options
| author | Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com> | 2021-11-16 12:48:46 +0000 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2022-02-01 15:04:24 +0530 |
| commit | 7c49bd50ed16644f46cac5ea711890efe49e2984 (patch) | |
| tree | cd55017a41e984db0d48ea9ab3fce05632389240 /board/keymile | |
| parent | 7539bb3b7cd2c0f94a283d55e4f3dacc628ed2cc (diff) | |
km: qrio: add function to read SLFTEST pin status
There is a request from HW designers to use this QRIO pin for detecting
DIC26_SELFTEST status instead of a GPIO pin.
This pin is typically used during production for executing POST tests and
starting test ESW bank.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'board/keymile')
| -rw-r--r-- | board/keymile/common/qrio.c | 13 | ||||
| -rw-r--r-- | board/keymile/common/qrio.h | 1 |
2 files changed, 14 insertions, 0 deletions
diff --git a/board/keymile/common/qrio.c b/board/keymile/common/qrio.c index da516918af..ed5e472034 100644 --- a/board/keymile/common/qrio.c +++ b/board/keymile/common/qrio.c @@ -27,6 +27,19 @@ void show_qrio(void) (id_rev >> 8) & 0xff, id_rev & 0xff); } +#define SLFTEST_OFF 0x06 + +bool qrio_get_selftest_pin(void) +{ + u8 slftest; + + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + slftest = in_8(qrio_base + SLFTEST_OFF); + + return (slftest & 1) > 0; +} + int qrio_get_gpio(u8 port_off, u8 gpio_nr) { u32 gprt; diff --git a/board/keymile/common/qrio.h b/board/keymile/common/qrio.h index 757bcbf2f3..c341cd9cb6 100644 --- a/board/keymile/common/qrio.h +++ b/board/keymile/common/qrio.h @@ -12,6 +12,7 @@ #define QRIO_GPIO_B 0x60 void show_qrio(void); +bool qrio_get_selftest_pin(void); int qrio_get_gpio(u8 port_off, u8 gpio_nr); void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val); void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value); |