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authorwdenk <wdenk>2004-03-02 14:05:39 +0000
committerwdenk <wdenk>2004-03-02 14:05:39 +0000
commitf8d813e34f03823ddfeb3b9f44a9807d3ffb847e (patch)
tree8aa8c3521520f576591d184c858d6ed3eb7a180e /board/icecube
parente7c85689bbf2f6aaeb68d5976da642ae80fa06b2 (diff)
* Fix SDRAM timings for LITE5200 / IceCube board
* Handle Auti-MDIX / connection status for INCA-IP * Fix USB problems when attempting to read 0 bytes
Diffstat (limited to 'board/icecube')
-rw-r--r--board/icecube/icecube.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
index 3c9e4eeb6ed..59431dbb36b 100644
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -54,16 +54,16 @@ static void sdram_start (int hi_addr)
*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002 | hi_addr_bit;
/* set mode register */
#if defined(CONFIG_MPC5200)
- *(vu_long *)MPC5XXX_SDRAM_MODE = 0x408d0000;
+ *(vu_long *)MPC5XXX_SDRAM_MODE = 0x00cd0000;
#elif defined(CONFIG_MGT5100)
*(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
#endif
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002 | hi_addr_bit;
+ /* auto refresh */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0004 | hi_addr_bit;
/* auto refresh */
*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0004 | hi_addr_bit;
/* set mode register */
- *(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
+ *(vu_long *)MPC5XXX_SDRAM_MODE = 0x00cd0000;
/* normal operation */
*(vu_long *)MPC5XXX_SDRAM_CTRL = 0x504f0000 | hi_addr_bit;
#endif
@@ -93,8 +93,8 @@ long int initdram (int board_type)
*(vu_long *)MPC5XXX_CDM_PORCFG = 0x10000000;
#else
/* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xc2233a00;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x88b70004;
+ *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xd2322800;
+ *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x8ad70000;
#endif
#elif defined(CONFIG_MGT5100)