diff options
| author | Ian Ray <ian.ray@ge.com> | 2019-01-31 16:21:14 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-04-13 20:30:08 +0200 |
| commit | 8d8d3540eb544fa29167d74029f92a99b9a31eea (patch) | |
| tree | dcb3004cce1940e64d46852bd77afa569bc0a95a /board/ge | |
| parent | 06f2e030d00053a13a8a81f4a352fd1ca8fbb66c (diff) | |
board: ge: bx50v3: Enable CONFIG_DM_SPI, CONFIG_DM_SPI_FLASH
Use SPI flash device model, and remove SPI pin configuration code since
the pinctrl driver is used.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Diffstat (limited to 'board/ge')
| -rw-r--r-- | board/ge/bx50v3/bx50v3.c | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index dac063dc43..b69b9e727b 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -53,9 +53,6 @@ static struct vpd_cache vpd; #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_FAST) -#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ PAD_CTL_ODE | PAD_CTL_SRE_FAST) @@ -113,13 +110,6 @@ static void setup_iomux_enet(void) mdelay(1); } -static iomux_v3_cfg_t const ecspi1_pads[] = { - MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - static struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | I2C_PAD, @@ -159,18 +149,6 @@ static struct i2c_pads_info i2c_pad_info3 = { } }; -#ifdef CONFIG_MXC_SPI -int board_spi_cs_gpio(unsigned bus, unsigned cs) -{ - return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(2, 30)) : -1; -} - -static void setup_spi(void) -{ - imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); -} -#endif - static iomux_v3_cfg_t const pcie_pads[] = { MX6_PAD_GPIO_5__GPIO1_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL), MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), @@ -594,9 +572,6 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; -#ifdef CONFIG_MXC_SPI - setup_spi(); -#endif return 0; } |