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authorMario Six <mario.six@gdsys.cc>2018-04-27 14:52:10 +0200
committerTom Rini <trini@konsulko.com>2018-05-08 18:50:23 -0400
commit9a519dfe8a3789012c6621f50e90a92b5ab84d21 (patch)
tree1a6cdb84e3243537da6d008748fcee09e852b7a6 /board/gdsys/common
parent9139ac9d492246a6c2af236e79c4f61d0dd55ac3 (diff)
ihs_mdio: Make DM-compatible
Make the ihs_mdio driver DM-compatible, while retaining the old functionality for not-yet-converted boards. Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'board/gdsys/common')
-rw-r--r--board/gdsys/common/ihs_mdio.c58
-rw-r--r--board/gdsys/common/ihs_mdio.h5
2 files changed, 58 insertions, 5 deletions
diff --git a/board/gdsys/common/ihs_mdio.c b/board/gdsys/common/ihs_mdio.c
index 664643486a0..b17e8db91bf 100644
--- a/board/gdsys/common/ihs_mdio.c
+++ b/board/gdsys/common/ihs_mdio.c
@@ -6,36 +6,84 @@
#include <common.h>
-#include <gdsys_fpga.h>
#include <miiphy.h>
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
+#include <gdsys_fpga.h>
+#else
+#include <fdtdec.h>
+#include <regmap.h>
+#endif
#include "ihs_mdio.h"
+#ifndef CONFIG_GDSYS_LEGACY_DRIVERS
+enum {
+ REG_MDIO_CONTROL = 0x0,
+ REG_MDIO_ADDR_DATA = 0x2,
+ REG_MDIO_RX_DATA = 0x4,
+};
+
+static inline u16 read_reg(struct udevice *fpga, uint base, uint addr)
+{
+ struct regmap *map;
+ u8 *ptr;
+
+ regmap_init_mem(fpga, &map);
+ ptr = regmap_get_range(map, 0);
+
+ return in_le16((u16 *)(ptr + base + addr));
+}
+
+static inline void write_reg(struct udevice *fpga, uint base, uint addr,
+ u16 val)
+{
+ struct regmap *map;
+ u8 *ptr;
+
+ regmap_init_mem(fpga, &map);
+ ptr = regmap_get_range(map, 0);
+
+ out_le16((u16 *)(ptr + base + addr), val);
+}
+#endif
+
static inline u16 read_control(struct ihs_mdio_info *info)
{
u16 val;
-
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
FPGA_GET_REG(info->fpga, mdio.control, &val);
-
+#else
+ val = read_reg(info->fpga, info->base, REG_MDIO_CONTROL);
+#endif
return val;
}
static inline void write_control(struct ihs_mdio_info *info, u16 val)
{
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
FPGA_SET_REG(info->fpga, mdio.control, val);
+#else
+ write_reg(info->fpga, info->base, REG_MDIO_CONTROL, val);
+#endif
}
static inline void write_addr_data(struct ihs_mdio_info *info, u16 val)
{
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
FPGA_SET_REG(info->fpga, mdio.address_data, val);
+#else
+ write_reg(info->fpga, info->base, REG_MDIO_ADDR_DATA, val);
+#endif
}
static inline u16 read_rx_data(struct ihs_mdio_info *info)
{
u16 val;
-
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
FPGA_GET_REG(info->fpga, mdio.rx_data, &val);
-
+#else
+ val = read_reg(info->fpga, info->base, REG_MDIO_RX_DATA);
+#endif
return val;
}
diff --git a/board/gdsys/common/ihs_mdio.h b/board/gdsys/common/ihs_mdio.h
index cddc335c107..d0a4b0d7a88 100644
--- a/board/gdsys/common/ihs_mdio.h
+++ b/board/gdsys/common/ihs_mdio.h
@@ -8,7 +8,12 @@
#define _IHS_MDIO_H_
struct ihs_mdio_info {
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
u32 fpga;
+#else
+ struct udevice *fpga;
+ int base;
+#endif
char *name;
};