diff options
| author | Tim Harvey <tharvey@gateworks.com> | 2021-07-27 15:19:37 -0700 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-08-09 14:46:50 +0200 |
| commit | 692c25ee30efd54a8259c145b705217edac2e843 (patch) | |
| tree | d23ca2bd0d046b9af56ab447c1900b333dcfa409 /board/gateworks | |
| parent | 42bc70d14aa866403bc652a8c656b8a329af9f4e (diff) | |
board: gateworks: venice: get mem size from dt
Get mem size from dt which SPL updated per EEPROM config.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'board/gateworks')
| -rw-r--r-- | board/gateworks/venice/imx8mm_venice.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/board/gateworks/venice/imx8mm_venice.c b/board/gateworks/venice/imx8mm_venice.c index 2657bd675f..ff64d697a7 100644 --- a/board/gateworks/venice/imx8mm_venice.c +++ b/board/gateworks/venice/imx8mm_venice.c @@ -13,6 +13,7 @@ #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> #include <asm/io.h> +#include <asm/unaligned.h> #include "gsc.h" @@ -20,20 +21,19 @@ DECLARE_GLOBAL_DATA_PTR; int board_phys_sdram_size(phys_size_t *size) { - int ddr_size = readl(M4_BOOTROM_BASE_ADDR); - - if (ddr_size == 0x4) { - *size = 0x100000000; - } else if (ddr_size == 0x3) { - *size = 0xc0000000; - } else if (ddr_size == 0x2) { - *size = 0x80000000; - } else if (ddr_size == 0x1) { - *size = 0x40000000; - } else { - printf("Unknown DDR type!!!\n"); - *size = 0x40000000; - } + const fdt64_t *val; + int offset; + int len; + + /* get size from dt which SPL updated per EEPROM config */ + offset = fdt_path_offset(gd->fdt_blob, "/memory"); + if (offset < 0) + return -EINVAL; + + val = fdt_getprop(gd->fdt_blob, offset, "reg", &len); + if (len < sizeof(*val) * 2) + return -EINVAL; + *size = get_unaligned_be64(&val[1]); return 0; } |