diff options
| author | Priyanka Jain <priyanka.jain@nxp.com> | 2020-09-21 11:56:39 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-09-24 08:27:44 -0400 |
| commit | 53e3096cd0a76c59c69250dd46e8278dc1db553b (patch) | |
| tree | ed6004e4f8044fd4b77f341741ce8b1e6bed2bf4 /board/freescale | |
| parent | da3dd417d73ffadfaf8837aaa5c170ead3334df2 (diff) | |
board/freescale: Remove P1020MBG board support
Remove NXP powerpc P1020MBG board support as it is no
longer maintained.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/p1_p2_rdb_pc/Kconfig | 3 | ||||
| -rw-r--r-- | board/freescale/p1_p2_rdb_pc/MAINTAINERS | 4 | ||||
| -rw-r--r-- | board/freescale/p1_p2_rdb_pc/tlb.c | 4 |
3 files changed, 3 insertions, 8 deletions
diff --git a/board/freescale/p1_p2_rdb_pc/Kconfig b/board/freescale/p1_p2_rdb_pc/Kconfig index 39982b42a5..0f4f14df92 100644 --- a/board/freescale/p1_p2_rdb_pc/Kconfig +++ b/board/freescale/p1_p2_rdb_pc/Kconfig @@ -1,5 +1,4 @@ -if TARGET_P1020MBG || \ - TARGET_P1020RDB_PC || \ +if TARGET_P1020RDB_PC || \ TARGET_P1020RDB_PD || \ TARGET_P1021RDB || \ TARGET_P1024RDB || \ diff --git a/board/freescale/p1_p2_rdb_pc/MAINTAINERS b/board/freescale/p1_p2_rdb_pc/MAINTAINERS index 710deedf99..2f35622294 100644 --- a/board/freescale/p1_p2_rdb_pc/MAINTAINERS +++ b/board/freescale/p1_p2_rdb_pc/MAINTAINERS @@ -3,10 +3,6 @@ P1_P2_RDB_PC BOARD S: Maintained F: board/freescale/p1_p2_rdb_pc/ F: include/configs/p1_p2_rdb_pc.h -F: configs/P1020MBG-PC_defconfig -F: configs/P1020MBG-PC_36BIT_defconfig -F: configs/P1020MBG-PC_36BIT_SDCARD_defconfig -F: configs/P1020MBG-PC_SDCARD_defconfig F: configs/P1020RDB-PC_defconfig F: configs/P1020RDB-PC_36BIT_defconfig F: configs/P1020RDB-PC_36BIT_NAND_defconfig diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c index 14971f0476..fcd7a55199 100644 --- a/board/freescale/p1_p2_rdb_pc/tlb.c +++ b/board/freescale/p1_p2_rdb_pc/tlb.c @@ -84,13 +84,13 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, 0, 8, BOOKE_PAGESZ_1G, 1), -#if defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_TARGET_P1020RDB_PD) +#if defined(CONFIG_TARGET_P1020RDB_PD) /* 2G DDR on P1020MBG, map the second 1G */ SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 9, BOOKE_PAGESZ_1G, 1), -#endif /* TARGET_P1020MBG */ +#endif #endif /* RAMBOOT/SPL */ #ifdef CONFIG_SYS_INIT_L2_ADDR |