diff options
| author | Terry Lv <r65388@freescale.com> | 2009-05-14 16:38:57 +0800 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2012-09-05 14:56:57 -0400 |
| commit | 69331e8ee3b6bf4ffd35697467141ff050bed11e (patch) | |
| tree | f99cd9f1e14732e09ef66fc3a58dd2c875ef18ff /board/freescale/mx51_3stack | |
| parent | 7d473f91ac8191cc4d05810d9d11a52764207ded (diff) | |
ENGR00112273 BBG2: MMC boot support.
BBG2: MMC boot support.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'board/freescale/mx51_3stack')
| -rw-r--r-- | board/freescale/mx51_3stack/mx51_3stack.c | 79 | ||||
| -rw-r--r-- | board/freescale/mx51_3stack/u-boot.lds | 1 |
2 files changed, 80 insertions, 0 deletions
diff --git a/board/freescale/mx51_3stack/mx51_3stack.c b/board/freescale/mx51_3stack/mx51_3stack.c index c7f93aace3..9ddee40855 100644 --- a/board/freescale/mx51_3stack/mx51_3stack.c +++ b/board/freescale/mx51_3stack/mx51_3stack.c @@ -35,6 +35,7 @@ DECLARE_GLOBAL_DATA_PTR; static u32 system_rev; u32 mx51_io_base_addr; +volatile u32 *esdhc_base_pointer; u32 get_board_rev(void) { @@ -209,3 +210,81 @@ int board_eth_init(bd_t *bis) return rc; } #endif + +#ifdef CONFIG_FSL_MMC + +int sdhc_init(void) +{ + u32 interface_esdhc = 0; + u32 pad_val = 0; + s32 status = 0; + + interface_esdhc = (readl(SRC_BASE_ADDR + 0x4) & (0x00180000)) >> 19; + + switch (interface_esdhc) { + case 0: + + esdhc_base_pointer = (volatile u32 *)MMC_SDHC1_BASE_ADDR; + + mxc_request_iomux(MX51_PIN_SD1_CMD, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX51_PIN_SD1_CLK, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + + mxc_request_iomux(MX51_PIN_SD1_DATA0, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX51_PIN_SD1_DATA1, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX51_PIN_SD1_DATA2, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX51_PIN_SD1_DATA3, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_iomux_set_pad(MX51_PIN_SD1_CMD, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | + PAD_CTL_PUE_PULL | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX51_PIN_SD1_CLK, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_47K_PU | + PAD_CTL_PUE_PULL | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX51_PIN_SD1_DATA0, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | + PAD_CTL_PUE_PULL | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX51_PIN_SD1_DATA1, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | + PAD_CTL_PUE_PULL | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX51_PIN_SD1_DATA2, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | + PAD_CTL_PUE_PULL | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX51_PIN_SD1_DATA3, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PD | + PAD_CTL_PUE_PULL | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + break; + case 1: + status = 1; + break; + case 2: + status = 1; + break; + case 3: + status = 1; + break; + default: + status = 1; + break; + } + + return status = 1; +} + +#endif diff --git a/board/freescale/mx51_3stack/u-boot.lds b/board/freescale/mx51_3stack/u-boot.lds index 1cf3c3dd63..8671fff3b2 100644 --- a/board/freescale/mx51_3stack/u-boot.lds +++ b/board/freescale/mx51_3stack/u-boot.lds @@ -44,6 +44,7 @@ SECTIONS lib_arm/libarm.a (.text) net/libnet.a (.text) drivers/mtd/libmtd.a (.text) + drivers/mmc/libmmc.a (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o(.text) |