diff options
| author | Shengzhou Liu <Shengzhou.Liu@nxp.com> | 2016-04-07 16:22:21 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-05-17 09:26:19 -0700 |
| commit | 074596c0b5f4e9a3642a3159a9fc7f8b8064c18a (patch) | |
| tree | 645933dc5c430f57d2c27ce98af98329d02852e0 /board/freescale/ls1043aqds | |
| parent | aeaec0e682f45b9e0c62c522fafea353931f73ed (diff) | |
armv8/ls1043: Add workaround for DDR erratum A-008850
Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1043aqds')
| -rw-r--r-- | board/freescale/ls1043aqds/ddr.c | 1 | ||||
| -rw-r--r-- | board/freescale/ls1043aqds/ddr.h | 2 | ||||
| -rw-r--r-- | board/freescale/ls1043aqds/ls1043aqds.c | 8 |
3 files changed, 3 insertions, 8 deletions
diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c index 3d3c53385a..0fd835d74f 100644 --- a/board/freescale/ls1043aqds/ddr.c +++ b/board/freescale/ls1043aqds/ddr.c @@ -116,6 +116,7 @@ phys_size_t initdram(int board_type) dram_size = fsl_ddr_sdram(); #endif + erratum_a008850_post(); #ifdef CONFIG_FSL_DEEP_SLEEP fsl_dp_ddr_restore(); diff --git a/board/freescale/ls1043aqds/ddr.h b/board/freescale/ls1043aqds/ddr.h index 8adb660012..d3f40822b7 100644 --- a/board/freescale/ls1043aqds/ddr.h +++ b/board/freescale/ls1043aqds/ddr.h @@ -7,6 +7,8 @@ #ifndef __DDR_H__ #define __DDR_H__ +extern void erratum_a008850_post(void); + struct board_specific_parameters { u32 n_ranks; u32 datarate_mhz_high; diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index fba6b88951..fc097d968a 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -307,14 +307,6 @@ int misc_init_r(void) int board_init(void) { - struct ccsr_cci400 *cci = (struct ccsr_cci400 *) - CONFIG_SYS_CCI400_ADDR; - - /* Set CCI-400 control override register to enable barrier - * transaction */ - out_le32(&cci->ctrl_ord, - CCI400_CTRLORD_EN_BARRIER); - select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); board_retimer_init(); |