diff options
| author | Tom Rini <trini@konsulko.com> | 2018-12-10 17:12:52 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-12-10 17:19:59 -0500 |
| commit | d94604d558cda9f89722c967d6f8d6269a2db21c (patch) | |
| tree | 2ccba6dac6920892a2075ab6d0f2b7e6d99c1cb5 /board/freescale/ls1012ardb | |
| parent | 2918f58faa565bcf89ac8c9e827a2e290ea96f55 (diff) | |
| parent | 4909b89ec763f0c7030fa8474f9b6c5df866b01f (diff) | |
Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq
Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC
[trini: Add a bunch of missing MAINTAINERS entries]
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/freescale/ls1012ardb')
| -rw-r--r-- | board/freescale/ls1012ardb/Kconfig | 4 | ||||
| -rw-r--r-- | board/freescale/ls1012ardb/MAINTAINERS | 4 | ||||
| -rw-r--r-- | board/freescale/ls1012ardb/ls1012ardb.c | 16 |
3 files changed, 23 insertions, 1 deletions
diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig index 4cd66bd548..51efd0fa37 100644 --- a/board/freescale/ls1012ardb/Kconfig +++ b/board/freescale/ls1012ardb/Kconfig @@ -33,6 +33,10 @@ config SYS_LS_PFE_FW_ADDR hex "Flash address of PFE firmware" default 0x40a00000 +config SYS_LS_PFE_ESBC_ADDR + hex "PFE Firmware HDR Addr" + default 0x40700000 + config DDR_PFE_PHYS_BASEADDR hex "PFE DDR physical base address" default 0x03800000 diff --git a/board/freescale/ls1012ardb/MAINTAINERS b/board/freescale/ls1012ardb/MAINTAINERS index a0a0d8dc24..60e184d10f 100644 --- a/board/freescale/ls1012ardb/MAINTAINERS +++ b/board/freescale/ls1012ardb/MAINTAINERS @@ -1,9 +1,13 @@ LS1012ARDB BOARD M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> +M: Rajesh Bhagat <rajesh.bhagat@nxp.com> S: Maintained F: board/freescale/ls1012ardb/ F: include/configs/ls1012ardb.h F: configs/ls1012ardb_qspi_defconfig +F: configs/ls1012ardb_tfa_defconfig +F: configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +F: configs/ls1012a2g5rdb_tfa_defconfig M: Sumit Garg <sumit.garg@nxp.com> S: Maintained diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index 888f8500d4..f648a9040b 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -87,8 +87,19 @@ int checkboard(void) return 0; } +#ifdef CONFIG_TFABOOT int dram_init(void) { + gd->ram_size = tfa_get_dram_size(); + if (!gd->ram_size) + gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + + return 0; +} +#else +int dram_init(void) +{ +#ifndef CONFIG_TFABOOT static const struct fsl_mmdc_info mparam = { 0x05180000, /* mdctl */ 0x00030035, /* mdpdc */ @@ -106,6 +117,7 @@ int dram_init(void) }; mmdc_init(&mparam); +#endif gd->ram_size = CONFIG_SYS_SDRAM_SIZE; #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) @@ -115,6 +127,7 @@ int dram_init(void) return 0; } +#endif int board_early_init_f(void) @@ -132,7 +145,8 @@ int board_init(void) * Set CCI-400 control override register to enable barrier * transaction */ - out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); + if (current_el() == 3) + out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); #ifdef CONFIG_SYS_FSL_ERRATUM_A010315 erratum_a010315(); |