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authorYe Li <ye.li@nxp.com>2021-03-19 15:57:18 +0800
committerStefano Babic <sbabic@denx.de>2021-04-08 09:18:29 +0200
commit9e05cf0152cf833154abf77b72e7623a7e0b4ad7 (patch)
tree4d87ab256bc46771267a7b8f33360d3202b091cf /board/freescale/imx8mq_evk
parent10867a0dcbffe2ac440ba75dc485857e95dbb0c5 (diff)
imx8mq_evk: Applying default LPDDR4 script for B2
Both i.MX8MQ B1 and B2 should use default LPDDR4 script, while B0 has another dedicated script. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'board/freescale/imx8mq_evk')
-rw-r--r--board/freescale/imx8mq_evk/spl.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c
index 82753585f2..e8e0efe485 100644
--- a/board/freescale/imx8mq_evk/spl.c
+++ b/board/freescale/imx8mq_evk/spl.c
@@ -36,7 +36,7 @@ extern struct dram_timing_info dram_timing_b0;
static void spl_dram_init(void)
{
/* ddr init */
- if ((get_cpu_rev() & 0xfff) == CHIP_REV_2_1)
+ if (soc_rev() >= CHIP_REV_2_1)
ddr_init(&dram_timing);
else
ddr_init(&dram_timing_b0);