diff options
| author | Udit Agarwal <udit.agarwal@nxp.com> | 2019-11-07 16:11:39 +0000 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2019-11-08 16:32:08 +0530 |
| commit | bef18454044e62800ece687b8d50ddd853117660 (patch) | |
| tree | a8d95bf9cea72beebe92a497bfb4be5bfe0cc5e1 /board/freescale/common | |
| parent | 5536c3c9d0d10c1a4e440e71eac389df3a3dbfa7 (diff) | |
freescale/powerpc: Rename the config CONFIG_SECURE_BOOT name
Rename the CONFIG_SECURE_BOOT name to CONFIG_NXP_ESBC to avoid
conflicts with UEFI secure boot.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'board/freescale/common')
| -rw-r--r-- | board/freescale/common/p_corenet/tlb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c index 3d9459b133..c0ab1a5fd1 100644 --- a/board/freescale/common/p_corenet/tlb.c +++ b/board/freescale/common/p_corenet/tlb.c @@ -43,7 +43,7 @@ struct fsl_e_tlb_entry tlb_table[] = { /* *I*** - Covers boot page */ #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) -#if !defined(CONFIG_SECURE_BOOT) +#if !defined(CONFIG_NXP_ESBC) /* * *I*G - L3SRAM. When L3 is used as 1M SRAM, the address of the * SRAM is at 0xfff00000, it covered the 0xfffff000. |