arm: am57xx: cl-som-am57x: remove board support

U-Boot support for the CL-SOM-AM57x module is no longer required.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>

7 files changed, 0 insertions, 672 deletions

diff --git a/board/compulab/cl-som-am57x/Kconfig b/board/compulab/cl-som-am57x/Kconfig
deleted file mode 100644
index 85fc9a1fdb..0000000000
--- a/board/compulab/cl-som-am57x/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_CL_SOM_AM57X
-
-config SYS_BOARD
-	default "cl-som-am57x"
-
-config SYS_VENDOR
-	default "compulab"
-
-config SYS_CONFIG_NAME
-	default "cl-som-am57x"
-
-endif
diff --git a/board/compulab/cl-som-am57x/MAINTAINERS b/board/compulab/cl-som-am57x/MAINTAINERS
deleted file mode 100644
index e0195f4610..0000000000
--- a/board/compulab/cl-som-am57x/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-CL-SOM-AM57x BOARD
-M:	Uri Mashiach <uri.mashiach@compulab.co.il>
-S:	Maintained
-F:	board/compulab/cl-som-am57x/
-F:	include/configs/cl-som-am57x.h
-F:	configs/cl-som-am57x_defconfig
diff --git a/board/compulab/cl-som-am57x/Makefile b/board/compulab/cl-som-am57x/Makefile
deleted file mode 100644
index 566366bf6e..0000000000
--- a/board/compulab/cl-som-am57x/Makefile
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Makefile
-#
-# (C) Copyright 2016 CompuLab, Ltd. <www.compulab.co.il>
-#
-# Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
-#
-# SPDX-License-Identifier:     GPL-2.0+
-#
-
-ifdef CONFIG_SPL_BUILD
-obj-y	+= spl.o mux.o
-else
-obj-y	+= cl-som-am57x.o mux.o
-endif
-
-obj-$(CONFIG_DRIVER_TI_CPSW)	+= eth.o
diff --git a/board/compulab/cl-som-am57x/cl-som-am57x.c b/board/compulab/cl-som-am57x/cl-som-am57x.c
deleted file mode 100644
index fcba2a0e2a..0000000000
--- a/board/compulab/cl-som-am57x/cl-som-am57x.c
+++ /dev/null
@@ -1,78 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Board functions for CompuLab cl_som_am57x board
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- */
-
-#include <common.h>
-#include <palmas.h>
-#include <usb.h>
-#include <asm/gpio.h>
-#include <asm/arch/mmc_host_def.h>
-#include <asm/arch/sys_proto.h>
-#include "../common/common.h"
-#include "../common/eeprom.h"
-#include <asm/omap_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const struct omap_sysinfo sysinfo = {
-	"Board: CL-SOM-AM57x\n"
-};
-
-int board_init(void)
-{
-	/* Disable PMIC Powerhold feature, DEV_CTRL.DEV_ON = 1 */
-	palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1);
-
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-	return 0;
-}
-
-#ifdef CONFIG_MMC
-#define SB_SOM_CD_GPIO 187
-#define SB_SOM_WP_GPIO 188
-
-int board_mmc_init(bd_t *bis)
-{
-	int ret0, ret1;
-
-	ret0 = omap_mmc_init(0, 0, 0, SB_SOM_CD_GPIO, SB_SOM_WP_GPIO);
-	if (ret0)
-		printf("cl-som-am57x: failed to initialize mmc0\n");
-
-	ret1 = omap_mmc_init(1, 0, 0, -1, -1);
-	if (ret1)
-		printf("cl-som-am57x: failed to initialize mmc1\n");
-
-	return ret0 && ret1;
-}
-#endif /* CONFIG_MMC */
-
-int misc_init_r(void)
-{
-	cl_print_pcb_info();
-
-	return 0;
-}
-
-u32 get_board_rev(void)
-{
-	return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS);
-}
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	enable_usb_clocks(index);
-	return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	disable_usb_clocks(index);
-	return 0;
-}
diff --git a/board/compulab/cl-som-am57x/eth.c b/board/compulab/cl-som-am57x/eth.c
deleted file mode 100644
index 3c59457341..0000000000
--- a/board/compulab/cl-som-am57x/eth.c
+++ /dev/null
@@ -1,198 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Ethernet specific code for CompuLab CL-SOM-AM57x module
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Uri Mashiach <uri.mashiach@compulab.co.il>
- */
-
-#include <common.h>
-#include <cpsw.h>
-#include <environment.h>
-#include <miiphy.h>
-#include <asm/gpio.h>
-#include <asm/arch/sys_proto.h>
-#include "../common/eeprom.h"
-
-static void cpsw_control(int enabled)
-{
-	/* VTP can be added here */
-}
-
-static struct cpsw_slave_data cl_som_am57x_cpsw_slaves[] = {
-	{
-		.slave_reg_ofs	= 0x208,
-		.sliver_reg_ofs	= 0xd80,
-		.phy_addr	= 0,
-		.phy_if         = PHY_INTERFACE_MODE_RMII,
-	},
-	{
-		.slave_reg_ofs	= 0x308,
-		.sliver_reg_ofs	= 0xdc0,
-		.phy_addr	= 1,
-		.phy_if         = PHY_INTERFACE_MODE_RMII,
-
-	},
-};
-
-static struct cpsw_platform_data cl_som_am57_cpsw_data = {
-	.mdio_base		= CPSW_MDIO_BASE,
-	.cpsw_base		= CPSW_BASE,
-	.mdio_div		= 0xff,
-	.channels		= 8,
-	.cpdma_reg_ofs		= 0x800,
-	.slaves			= 2,
-	.slave_data		= cl_som_am57x_cpsw_slaves,
-	.ale_reg_ofs		= 0xd00,
-	.ale_entries		= 1024,
-	.host_port_reg_ofs	= 0x108,
-	.hw_stats_reg_ofs	= 0x900,
-	.bd_ram_ofs		= 0x2000,
-	.mac_control		= (1 << 5),
-	.control		= cpsw_control,
-	.host_port_num		= 0,
-	.version		= CPSW_CTRL_VERSION_2,
-};
-
-/*
- * cl_som_am57x_efuse_read_mac_addr() - read Ethernet port MAC address.
- *       The information is retrieved from the SOC's registers.
- * @buff: read buffer.
- * @port_num: port number.
- */
-static void cl_som_am57x_efuse_read_mac_addr(uchar *buff, uint port_num)
-{
-	uint32_t mac_hi, mac_lo;
-
-	if (port_num) {
-		mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
-		mac_hi = readl((*ctrl)->control_core_mac_id_1_hi);
-	} else {
-		mac_lo = readl((*ctrl)->control_core_mac_id_0_lo);
-		mac_hi = readl((*ctrl)->control_core_mac_id_0_hi);
-	}
-
-	buff[0] = (mac_hi & 0xFF0000) >> 16;
-	buff[1] = (mac_hi & 0xFF00) >> 8;
-	buff[2] = mac_hi & 0xFF;
-	buff[3] = (mac_lo & 0xFF0000) >> 16;
-	buff[4] = (mac_lo & 0xFF00) >> 8;
-	buff[5] = mac_lo & 0xFF;
-}
-
-/*
- * cl_som_am57x_handle_mac_address() - set MAC address in the U-Boot
- *	environment.
- *      The address is retrieved retrieved from an EEPROM field or from the
- *	SOC's registers.
- * @env_name: U-Boot environment name.
- * @field_name: EEPROM field name.
- * @port_num: SOC's port number.
- */
-static int cl_som_am57x_handle_mac_address(char *env_name, uint port_num)
-{
-	int ret;
-	uint8_t enetaddr[6];
-
-	ret = eth_env_get_enetaddr(env_name, enetaddr);
-	if (ret)
-		return 0;
-
-	ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS);
-
-	if (ret || !is_valid_ethaddr(enetaddr))
-		cl_som_am57x_efuse_read_mac_addr(enetaddr, port_num);
-
-	if (!is_valid_ethaddr(enetaddr))
-		return -1;
-
-	ret = eth_env_set_enetaddr(env_name, enetaddr);
-	if (ret)
-		printf("cl-som-am57x: Failed to set Eth port %d MAC address\n",
-		       port_num);
-
-	return ret;
-}
-
-#define CL_SOM_AM57X_PHY_ADDR2			0x01
-#define AR8033_PHY_DEBUG_ADDR_REG		0x1d
-#define AR8033_PHY_DEBUG_DATA_REG		0x1e
-#define AR8033_DEBUG_RGMII_RX_CLK_DLY_REG	0x00
-#define AR8033_DEBUG_RGMII_TX_CLK_DLY_REG	0x05
-#define AR8033_DEBUG_RGMII_RX_CLK_DLY_MASK	(1 << 15)
-#define AR8033_DEBUG_RGMII_TX_CLK_DLY_MASK	(1 << 8)
-
-/*
- * cl_som_am57x_rgmii_clk_delay() - Set RGMII clock delay.
- *	Enable RX delay, disable TX delay.
- */
-static void cl_som_am57x_rgmii_clk_delay(void)
-{
-	uint16_t mii_reg_val;
-	const char *devname;
-
-	devname = miiphy_get_current_dev();
-	/* PHY 2 */
-	miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_ADDR_REG,
-		     AR8033_DEBUG_RGMII_RX_CLK_DLY_REG);
-	miiphy_read(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
-		    &mii_reg_val);
-	mii_reg_val |= AR8033_DEBUG_RGMII_RX_CLK_DLY_MASK;
-	miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
-		     mii_reg_val);
-
-	miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_ADDR_REG,
-		     AR8033_DEBUG_RGMII_TX_CLK_DLY_REG);
-	miiphy_read(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
-		    &mii_reg_val);
-	mii_reg_val &= ~AR8033_DEBUG_RGMII_TX_CLK_DLY_MASK;
-	miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
-		     mii_reg_val);
-}
-
-#define CL_SOM_AM57X_GPIO_PHY1_RST 92 /* GPIO3_28 */
-#define CL_SOM_AM57X_RGMII_PORT1 1
-
-int board_eth_init(bd_t *bis)
-{
-	int ret;
-	uint32_t ctrl_val;
-	char *cpsw_phy_envval;
-	int cpsw_act_phy = 1;
-
-	/* SB-SOM-AM57x primary Eth (P21) is routed to RGMII1 */
-	ret = cl_som_am57x_handle_mac_address("ethaddr",
-					      CL_SOM_AM57X_RGMII_PORT1);
-
-	if (ret)
-		return -1;
-
-	/* Select RGMII for GMII1_SEL */
-	ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
-	ctrl_val |= 0x22;
-	writel(ctrl_val, (*ctrl)->control_core_control_io1);
-	mdelay(10);
-
-	gpio_request(CL_SOM_AM57X_GPIO_PHY1_RST, "phy1_rst");
-	gpio_direction_output(CL_SOM_AM57X_GPIO_PHY1_RST, 0);
-	mdelay(20);
-
-	gpio_set_value(CL_SOM_AM57X_GPIO_PHY1_RST, 1);
-	mdelay(20);
-
-	cpsw_phy_envval = env_get("cpsw_phy");
-	if (cpsw_phy_envval != NULL)
-		cpsw_act_phy = simple_strtoul(cpsw_phy_envval, NULL, 0);
-
-	cl_som_am57_cpsw_data.active_slave = cpsw_act_phy;
-
-	ret = cpsw_register(&cl_som_am57_cpsw_data);
-	if (ret < 0)
-		printf("Error %d registering CPSW switch\n", ret);
-
-	/* Set RGMII clock delay */
-	cl_som_am57x_rgmii_clk_delay();
-
-	return ret;
-}
diff --git a/board/compulab/cl-som-am57x/mux.c b/board/compulab/cl-som-am57x/mux.c
deleted file mode 100644
index 050f2aa3ef..0000000000
--- a/board/compulab/cl-som-am57x/mux.c
+++ /dev/null
@@ -1,123 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Pinmux configuration for CompuLab CL-SOM-AM57x board
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- */
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/mux_dra7xx.h>
-
-/* Serial console */
-static const struct pad_conf_entry cl_som_am57x_padconf_console[] = {
-	{UART3_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* UART3_RXD */
-	{UART3_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* UART3_TXD */
-};
-
-/* PMIC I2C */
-static const struct pad_conf_entry cl_som_am57x_padconf_pmic[] = {
-	{MCASP1_ACLKR, (M10 | PIN_INPUT)}, /* MCASP1_ACLKR.I2C4_SDA */
-	{MCASP1_FSR,   (M10 | PIN_INPUT)}, /* MCASP1_FSR.I2C4_SCL */
-};
-
-/* Green GPIO led */
-static const struct pad_conf_entry cl_som_am57x_padconf_green_led[] = {
-	{GPMC_A15, (M14 | PIN_OUTPUT_PULLDOWN)}, /* GPMC_A15.GPIO2_5 */
-};
-
-/* MMC/SD Card */
-static const struct pad_conf_entry cl_som_am57x_padconf_sd_card[] = {
-	{MMC1_CLK,  (M0  | PIN_INPUT_PULLUP)}, /* MMC1_CLK */
-	{MMC1_CMD,  (M0  | PIN_INPUT_PULLUP)}, /* MMC1_CMD */
-	{MMC1_DAT0, (M0  | PIN_INPUT_PULLUP)}, /* MMC1_DAT0 */
-	{MMC1_DAT1, (M0  | PIN_INPUT_PULLUP)}, /* MMC1_DAT1 */
-	{MMC1_DAT2, (M0  | PIN_INPUT_PULLUP)}, /* MMC1_DAT2 */
-	{MMC1_DAT3, (M0  | PIN_INPUT_PULLUP)}, /* MMC1_DAT3 */
-	{MMC1_SDCD, (M14 | PIN_INPUT)       }, /* MMC1_SDCD */
-	{MMC1_SDWP, (M14 | PIN_INPUT)       }, /* MMC1_SDWP */
-};
-
-/* WiFi - must be in the safe mode on boot */
-static const struct pad_conf_entry cl_som_am57x_padconf_wifi[] = {
-	{UART1_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART1_CTSN */
-	{UART1_RTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART1_RTSN */
-	{UART2_RXD,  (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_RXD */
-	{UART2_TXD,  (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_TXD */
-	{UART2_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_CTSN */
-	{UART2_RTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_RTSN */
-};
-
-/* QSPI */
-static const struct pad_conf_entry cl_som_am57x_padconf_qspi[] = {
-	{GPMC_A13, (M1 | PIN_INPUT)       }, /* GPMC_A13.QSPI1_RTCLK */
-	{GPMC_A18, (M1 | PIN_INPUT)       }, /* GPMC_A18.QSPI1_SCLK */
-	{GPMC_A16, (M1 | PIN_INPUT)       }, /* GPMC_A16.QSPI1_D0 */
-	{GPMC_A17, (M1 | PIN_INPUT)       }, /* GPMC_A17.QSPI1_D1 */
-	{GPMC_CS2, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_CS2.QSPI1_CS0 */
-};
-
-/* GPIO Expander I2C */
-static const struct pad_conf_entry cl_som_am57x_padconf_i2c_gpio[] = {
-	{MCASP1_AXR0, (M10 | PIN_INPUT)}, /* MCASP1_AXR0.I2C5_SDA */
-	{MCASP1_AXR1, (M10 | PIN_INPUT)}, /* MCASP1_AXR1.I2C5_SCL */
-};
-
-/* eMMC internal storage */
-static const struct pad_conf_entry cl_som_am57x_padconf_emmc[] = {
-	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A19.MMC2_DAT4 */
-	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A20.MMC2_DAT5 */
-	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A21.MMC2_DAT6 */
-	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A22.MMC2_DAT7 */
-	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A23.MMC2_CLK */
-	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A24.MMC2_DAT0 */
-	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A25.MMC2_DAT1 */
-	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A26.MMC2_DAT2 */
-	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A27.MMC2_DAT3 */
-	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_CS1.MMC2_CMD */
-};
-
-/* usb1_drvvbus */
-static const struct pad_conf_entry cl_som_am57x_padconf_usb[] = {
-	/* USB1_DRVVBUS.USB1_DRVVBUS */
-	{USB1_DRVVBUS, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL) },
-};
-
-/* Ethernet */
-static const struct pad_conf_entry cl_som_am57x_padconf_ethernet[] = {
-	/* MDIO bus */
-	{VIN2A_D10,  (M3  | PIN_OUTPUT_PULLUP) }, /* VIN2A_D10.MDIO_MCLK  */
-	{VIN2A_D11,  (M3  | PIN_INPUT_PULLUP)  }, /* VIN2A_D11.MDIO_D  */
-	/* EMAC Slave 1 at addr 0x1 - Default interface */
-	{VIN2A_D12,  (M3  | PIN_OUTPUT)         }, /* VIN2A_D12.RGMII1_TXC */
-	{VIN2A_D13,  (M3  | PIN_OUTPUT)         }, /* VIN2A_D13.RGMII1_TXCTL */
-	{VIN2A_D14,  (M3  | PIN_OUTPUT)         }, /* VIN2A_D14.RGMII1_TXD3 */
-	{VIN2A_D15,  (M3  | PIN_OUTPUT)         }, /* VIN2A_D15.RGMII1_TXD2 */
-	{VIN2A_D16,  (M3  | PIN_OUTPUT)         }, /* VIN2A_D16.RGMII1_TXD1 */
-	{VIN2A_D17,  (M3  | PIN_OUTPUT)         }, /* VIN2A_D17.RGMII1_TXD0 */
-	{VIN2A_D18,  (M3  | PIN_INPUT_PULLDOWN) }, /* VIN2A_D18.RGMII1_RXC */
-	{VIN2A_D19,  (M3  | PIN_INPUT_PULLDOWN) }, /* VIN2A_D19.RGMII1_RXCTL */
-	{VIN2A_D20,  (M3  | PIN_INPUT_PULLDOWN) }, /* VIN2A_D20.RGMII1_RXD3 */
-	{VIN2A_D21,  (M3  | PIN_INPUT_PULLDOWN) }, /* VIN2A_D21.RGMII1_RXD2 */
-	{VIN2A_D22,  (M3  | PIN_INPUT_PULLDOWN) }, /* VIN2A_D22.RGMII1_RXD1 */
-	{VIN2A_D23,  (M3  | PIN_INPUT_PULLDOWN) }, /* VIN2A_D23.RGMII1_RXD0 */
-	/* Eth PHY1 reset GPIOs*/
-	{VIN2A_CLK0, (M14 | PIN_OUTPUT_PULLDOWN)}, /* VIN2A_CLK0.GPIO3_28 */
-};
-
-#define SET_MUX(mux_array) do_set_mux32((*ctrl)->control_padconf_core_base, \
-					mux_array, ARRAY_SIZE(mux_array))
-
-void set_muxconf_regs(void)
-{
-	SET_MUX(cl_som_am57x_padconf_console);
-	SET_MUX(cl_som_am57x_padconf_pmic);
-	SET_MUX(cl_som_am57x_padconf_green_led);
-	SET_MUX(cl_som_am57x_padconf_sd_card);
-	SET_MUX(cl_som_am57x_padconf_wifi);
-	SET_MUX(cl_som_am57x_padconf_qspi);
-	SET_MUX(cl_som_am57x_padconf_i2c_gpio);
-	SET_MUX(cl_som_am57x_padconf_emmc);
-	SET_MUX(cl_som_am57x_padconf_usb);
-	SET_MUX(cl_som_am57x_padconf_ethernet);
-}
diff --git a/board/compulab/cl-som-am57x/spl.c b/board/compulab/cl-som-am57x/spl.c
deleted file mode 100644
index 0fb3d84a02..0000000000
--- a/board/compulab/cl-som-am57x/spl.c
+++ /dev/null
@@ -1,238 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * SPL data and initialization for CompuLab CL-SOM-AM57x board
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Uri Mashiach <uri.mashiach@compulab.co.il>
- */
-
-#include <asm/emif.h>
-#include <asm/omap_common.h>
-#include <asm/arch/sys_proto.h>
-
-static const struct dmm_lisa_map_regs cl_som_am57x_lisa_regs = {
-	.dmm_lisa_map_3 = 0x80740300,
-	.is_ma_present  = 0x1
-};
-
-void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
-{
-	/* Disable SDRAM controller EMIF2 for single core SOC */
-	*dmm_lisa_regs = &cl_som_am57x_lisa_regs;
-	if (omap_revision() == DRA722_ES1_0) {
-		((struct dmm_lisa_map_regs *) *dmm_lisa_regs)->dmm_lisa_map_3 =
-		  0x80640100;
-	}
-}
-
-static const struct emif_regs cl_som_am57x_emif1_ddr3_532mhz_emif_regs = {
-	.sdram_config_init	= 0x61852332,
-	.sdram_config		= 0x61852332,
-	.sdram_config2		= 0x00000000,
-	.ref_ctrl		= 0x000040f1,
-	.ref_ctrl_final		= 0x00001040,
-	.sdram_tim1		= 0xeeef36f3,
-	.sdram_tim2		= 0x348f7fda,
-	.sdram_tim3		= 0x027f88a8,
-	.read_idle_ctrl		= 0x00050000,
-	.zq_config		= 0x1007190b,
-	.temp_alert_config	= 0x00000000,
-	.emif_ddr_phy_ctlr_1_init = 0x0034400b,
-	.emif_ddr_phy_ctlr_1	= 0x0e34400b,
-	.emif_ddr_ext_phy_ctrl_1 = 0x04040100,
-	.emif_ddr_ext_phy_ctrl_2 = 0x00740074,
-	.emif_ddr_ext_phy_ctrl_3 = 0x00780078,
-	.emif_ddr_ext_phy_ctrl_4 = 0x007c007c,
-	.emif_ddr_ext_phy_ctrl_5 = 0x007b007b,
-	.emif_rd_wr_lvl_rmp_win	= 0x00000000,
-	.emif_rd_wr_lvl_rmp_ctl	= 0x80000000,
-	.emif_rd_wr_lvl_ctl	= 0x00000000,
-	.emif_rd_wr_exec_thresh	= 0x00000305
-};
-
-/* Ext phy ctrl regs 1-35 */
-static const u32 cl_som_am57x_emif1_ddr3_ext_phy_ctrl_regs[] = {
-	0x10040100,
-	0x00740074,
-	0x00780078,
-	0x007c007c,
-	0x007b007b,
-	0x00800080,
-	0x00360036,
-	0x00340034,
-	0x00360036,
-	0x00350035,
-	0x00350035,
-
-	0x01ff01ff,
-	0x01ff01ff,
-	0x01ff01ff,
-	0x01ff01ff,
-	0x01ff01ff,
-
-	0x00430043,
-	0x003e003e,
-	0x004a004a,
-	0x00470047,
-	0x00400040,
-
-	0x00000000,
-	0x00600020,
-	0x40011080,
-	0x08102040,
-
-	0x00400040,
-	0x00400040,
-	0x00400040,
-	0x00400040,
-	0x00400040,
-	0x0,
-	0x0,
-	0x0,
-	0x0,
-	0x0
-};
-
-static const struct emif_regs cl_som_am57x_emif2_ddr3_532mhz_emif_regs = {
-	.sdram_config_init	= 0x61852332,
-	.sdram_config		= 0x61852332,
-	.sdram_config2		= 0x00000000,
-	.ref_ctrl		= 0x000040f1,
-	.ref_ctrl_final		= 0x00001040,
-	.sdram_tim1		= 0xeeef36f3,
-	.sdram_tim2		= 0x348f7fda,
-	.sdram_tim3		= 0x027f88a8,
-	.read_idle_ctrl		= 0x00050000,
-	.zq_config		= 0x1007190b,
-	.temp_alert_config	= 0x00000000,
-	.emif_ddr_phy_ctlr_1_init = 0x0034400b,
-	.emif_ddr_phy_ctlr_1	= 0x0e34400b,
-	.emif_ddr_ext_phy_ctrl_1 = 0x04040100,
-	.emif_ddr_ext_phy_ctrl_2 = 0x00740074,
-	.emif_ddr_ext_phy_ctrl_3 = 0x00780078,
-	.emif_ddr_ext_phy_ctrl_4 = 0x007c007c,
-	.emif_ddr_ext_phy_ctrl_5 = 0x007b007b,
-	.emif_rd_wr_lvl_rmp_win	= 0x00000000,
-	.emif_rd_wr_lvl_rmp_ctl	= 0x80000000,
-	.emif_rd_wr_lvl_ctl	= 0x00000000,
-	.emif_rd_wr_exec_thresh	= 0x00000305
-};
-
-static const u32 cl_som_am57x_emif2_ddr3_ext_phy_ctrl_regs[] = {
-	0x10040100,
-	0x00820082,
-	0x008b008b,
-	0x00800080,
-	0x007e007e,
-	0x00800080,
-	0x00370037,
-	0x00390039,
-	0x00360036,
-	0x00370037,
-	0x00350035,
-	0x01ff01ff,
-	0x01ff01ff,
-	0x01ff01ff,
-	0x01ff01ff,
-	0x01ff01ff,
-	0x00540054,
-	0x00540054,
-	0x004e004e,
-	0x004c004c,
-	0x00400040,
-
-	0x00000000,
-	0x00600020,
-	0x40011080,
-	0x08102040,
-
-	0x00400040,
-	0x00400040,
-	0x00400040,
-	0x00400040,
-	0x00400040,
-	0x0,
-	0x0,
-	0x0,
-	0x0,
-	0x0
-};
-
-static struct vcores_data cl_som_am57x_volts = {
-	.mpu.value[OPP_NOM]	= VDD_MPU_DRA7_NOM,
-	.mpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_MPU_NOM,
-	.mpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
-	.mpu.addr		= TPS659038_REG_ADDR_SMPS12,
-	.mpu.pmic		= &tps659038,
-
-	.eve.value[OPP_NOM]	= VDD_EVE_DRA7_NOM,
-	.eve.value[OPP_OD]	= VDD_EVE_DRA7_OD,
-	.eve.value[OPP_HIGH]	= VDD_EVE_DRA7_HIGH,
-	.eve.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_DSPEVE_NOM,
-	.eve.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_DSPEVE_OD,
-	.eve.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
-	.eve.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
-	.eve.addr		= TPS659038_REG_ADDR_SMPS45,
-	.eve.pmic		= &tps659038,
-
-	.gpu.value[OPP_NOM]	= VDD_GPU_DRA7_NOM,
-	.gpu.value[OPP_OD]	= VDD_GPU_DRA7_OD,
-	.gpu.value[OPP_HIGH]	= VDD_GPU_DRA7_HIGH,
-	.gpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_GPU_NOM,
-	.gpu.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_GPU_OD,
-	.gpu.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_GPU_HIGH,
-	.gpu.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
-	.gpu.addr		= TPS659038_REG_ADDR_SMPS6,
-	.gpu.pmic		= &tps659038,
-
-	.core.value[OPP_NOM]	= VDD_CORE_DRA7_NOM,
-	.core.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_CORE_NOM,
-	.core.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
-	.core.addr		= TPS659038_REG_ADDR_SMPS7,
-	.core.pmic		= &tps659038,
-
-	.iva.value[OPP_NOM]	= VDD_IVA_DRA7_NOM,
-	.iva.value[OPP_OD]	= VDD_IVA_DRA7_OD,
-	.iva.value[OPP_HIGH]	= VDD_IVA_DRA7_HIGH,
-	.iva.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_IVA_NOM,
-	.iva.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_IVA_OD,
-	.iva.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_IVA_HIGH,
-	.iva.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
-	.iva.addr		= TPS659038_REG_ADDR_SMPS8,
-	.iva.pmic		= &tps659038,
-};
-
-void hw_data_init(void)
-{
-	*prcm = &dra7xx_prcm;
-	*dplls_data = &dra7xx_dplls;
-	*omap_vcores = &cl_som_am57x_volts;
-	*ctrl = &dra7xx_ctrl;
-}
-
-void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
-{
-	switch (emif_nr) {
-	case 1:
-		*regs = &cl_som_am57x_emif1_ddr3_532mhz_emif_regs;
-		break;
-	case 2:
-		*regs = &cl_som_am57x_emif2_ddr3_532mhz_emif_regs;
-		break;
-	}
-}
-
-void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size)
-{
-	switch (emif_nr) {
-	case 1:
-		*regs = cl_som_am57x_emif1_ddr3_ext_phy_ctrl_regs;
-		*size = ARRAY_SIZE(cl_som_am57x_emif1_ddr3_ext_phy_ctrl_regs);
-		break;
-	case 2:
-		*regs = cl_som_am57x_emif2_ddr3_ext_phy_ctrl_regs;
-		*size = ARRAY_SIZE(cl_som_am57x_emif2_ddr3_ext_phy_ctrl_regs);
-		break;
-	}
-}