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authorMarc Dietrich <marvin24@gmx.de>2012-11-25 11:26:12 +0000
committerTom Warren <twarren@nvidia.com>2013-01-16 13:40:07 -0700
commit25dccd6fdd30656e70619ca70b947c9f67466667 (patch)
tree62f2b52e93b2140e8d3d891b3e70c3b056c81950 /board/compal
parent716d94398344baa313c381b64c97ea20544454ca (diff)
tegra: enable LCD on PAZ00
This adds LCD panel descriptions to the device tree of PAZ00 and enables LCD support in the configuration. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/compal')
-rw-r--r--board/compal/dts/tegra20-paz00.dts32
-rw-r--r--board/compal/paz00/paz00.c11
2 files changed, 43 insertions, 0 deletions
diff --git a/board/compal/dts/tegra20-paz00.dts b/board/compal/dts/tegra20-paz00.dts
index 9e3e169069..afebbe59c6 100644
--- a/board/compal/dts/tegra20-paz00.dts
+++ b/board/compal/dts/tegra20-paz00.dts
@@ -54,4 +54,36 @@
usb@c5004000 {
status = "disabled";
};
+
+ host1x {
+ status = "okay";
+ dc@54200000 {
+ status = "okay";
+ rgb {
+ status = "okay";
+ nvidia,panel = <&lcd_panel>;
+ };
+ };
+ };
+
+ lcd_panel: panel {
+ /* PAZ00 has 1024x600 */
+ clock = <54030000>;
+ xres = <1024>;
+ yres = <600>;
+ right-margin = <160>;
+ left-margin = <24>;
+ hsync-len = <136>;
+ upper-margin = <3>;
+ lower-margin = <61>;
+ vsync-len = <6>;
+ hsync-active-high;
+ nvidia,bits-per-pixel = <16>;
+ nvidia,pwm = <&pwm 0 0>;
+ nvidia,backlight-enable-gpios = <&gpio 164 0>; /* PU4 */
+ nvidia,lvds-shutdown-gpios = <&gpio 102 0>; /* PM6 */
+ nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
+ nvidia,panel-vdd-gpios = <&gpio 4 0>; /* PA4 */
+ nvidia,panel-timings = <400 4 203 17 15>;
+ };
};
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c
index 6492d4168e..1447f47605 100644
--- a/board/compal/paz00/paz00.c
+++ b/board/compal/paz00/paz00.c
@@ -71,3 +71,14 @@ int board_mmc_init(bd_t *bd)
return 0;
}
#endif
+
+#ifdef CONFIG_LCD
+/* this is a weak define that we are overriding */
+void pin_mux_display(void)
+{
+ debug("init display pinmux\n");
+
+ /* EN_VDD_PANEL GPIO A4 */
+ pinmux_tristate_disable(PINGRP_DAP2);
+}
+#endif