rename CFG_ macros to CONFIG_SYS

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

4 files changed, 38 insertions, 38 deletions

diff --git a/board/cogent/README b/board/cogent/README
index e6eef662c9b..31ca187b59b 100644
--- a/board/cogent/README
+++ b/board/cogent/README
@@ -80,16 +80,16 @@ To configure, perform the usual U-Boot configuration task of editing
 "include/config_cogent_mpc8xx.h" and reviewing all the options and
 settings in there. In particular, check the chip select values
 installed into the memory controller's various option and base
-registers - these are set by the defines CFG_CMA_CSn_{BASE,SIZE} and
-CFG_{B,O}Rn_PRELIM. Also be careful of the clock settings installed
-into the SCCR - via the define CFG_SCCR. Finally, decide whether you
+registers - these are set by the defines CONFIG_SYS_CMA_CSn_{BASE,SIZE} and
+CONFIG_SYS_{B,O}Rn_PRELIM. Also be careful of the clock settings installed
+into the SCCR - via the define CONFIG_SYS_SCCR. Finally, decide whether you
 want the serial console on motherboard serial port A or on one of the
 8xx SMC ports, and set CONFIG_8xx_CONS_{SMC1,SMC2,NONE} accordingly
 (NONE means use Cogent motherboard serial port A).
 
 Then edit the file "cogent/config.mk". Firstly, set TEXT_BASE to be
 the base address of the EPROM for the CPU module. This should be the
-same as the value selected for CFG_MONITOR_BASE in
+same as the value selected for CONFIG_SYS_MONITOR_BASE in
 "include/config_cogent_*.h" (in fact, I have made this automatic via
 the -DTEXT_BASE=... option in CPPFLAGS).
 
diff --git a/board/cogent/flash.c b/board/cogent/flash.c
index 942f33ab02d..e6c85b6d9a5 100644
--- a/board/cogent/flash.c
+++ b/board/cogent/flash.c
@@ -24,11 +24,11 @@
 #include <common.h>
 #include <board/cogent/flash.h>
 
-flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
 
 #if defined(CONFIG_ENV_IS_IN_FLASH)
 # ifndef  CONFIG_ENV_ADDR
-#  define CONFIG_ENV_ADDR	(CFG_FLASH_BASE + CONFIG_ENV_OFFSET)
+#  define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
 # endif
 # ifndef  CONFIG_ENV_SIZE
 #  define CONFIG_ENV_SIZE	CONFIG_ENV_SECT_SIZE
@@ -121,7 +121,7 @@ c302f_probe(flash_info_t *fip, c302f_addr_t base)
 		fip->size += C302F_BNK_SIZE;
 		osc = fip->sector_count;
 		fip->sector_count += C302F_BNK_NBLOCKS;
-		if ((nsc = fip->sector_count) >= CFG_MAX_FLASH_SECT)
+		if ((nsc = fip->sector_count) >= CONFIG_SYS_MAX_FLASH_SECT)
 			panic("Too many sectors in flash at address 0x%08lx\n",
 				(unsigned long)base);
 
@@ -264,7 +264,7 @@ c302f_write_word(c302f_addr_t addr, c302f_word_t value)
 	/* data polling for D7 */
 	start = get_timer (0);
 	do {
-		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
 			retval = 1;
 			goto done;
 		}
@@ -295,7 +295,7 @@ flash_init(void)
 	flash_info_t *fip;
 
 	/* Init: no FLASHes known */
-	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
 		flash_info[i].flash_id = FLASH_UNKNOWN;
 	}
 
@@ -303,7 +303,7 @@ flash_init(void)
 	total = 0L;
 
 #if defined(CONFIG_CMA302)
-	c302f_probe(fip, (c302f_addr_t)CFG_FLASH_BASE);
+	c302f_probe(fip, (c302f_addr_t)CONFIG_SYS_FLASH_BASE);
 	total += fip->size;
 	fip++;
 #endif
@@ -320,10 +320,10 @@ flash_init(void)
 	 * protect monitor and environment sectors
 	 */
 
-#if CFG_MONITOR_BASE == CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
 	flash_protect(FLAG_PROTECT_SET,
-		      CFG_MONITOR_BASE,
-		      CFG_MONITOR_BASE+monitor_flash_len-1,
+		      CONFIG_SYS_MONITOR_BASE,
+		      CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
 		      &flash_info[0]);
 #endif
 
@@ -472,7 +472,7 @@ flash_erase(flash_info_t *info, int s_first, int s_last)
 			do {
 				now = get_timer(start);
 
-				if (now - estart > CFG_FLASH_ERASE_TOUT) {
+				if (now - estart > CONFIG_SYS_FLASH_ERASE_TOUT) {
 					printf ("Timeout (sect %d)\n", sect);
 					haderr = 1;
 					break;
diff --git a/board/cogent/lcd.c b/board/cogent/lcd.c
index 814b4c80a04..76f5ad103fa 100644
--- a/board/cogent/lcd.c
+++ b/board/cogent/lcd.c
@@ -197,7 +197,7 @@ void
 lcd_printf(const char *fmt, ...)
 {
     va_list args;
-    char buf[CFG_PBSIZE];
+    char buf[CONFIG_SYS_PBSIZE];
 
     va_start(args, fmt);
     (void)vsprintf(buf, fmt, args);
@@ -234,7 +234,7 @@ lcd_heartbeat(void)
 void board_show_activity (ulong timestamp)
 {
 #ifdef CONFIG_STATUS_LED
-	if ((timestamp % (CFG_HZ / 2) == 0)
+	if ((timestamp % (CONFIG_SYS_HZ / 2) == 0)
 		lcd_heartbeat ();
 #endif
 }
diff --git a/board/cogent/mb.h b/board/cogent/mb.h
index f6eaf0ac5ee..b3aba48f7f2 100644
--- a/board/cogent/mb.h
+++ b/board/cogent/mb.h
@@ -69,51 +69,51 @@
  * 0xA000000-0xDFFFFFF.
  */
 
-#define CMA_MB_RAM_BASE		(CFG_CMA_MB_BASE+0x0000000)
+#define CMA_MB_RAM_BASE		(CONFIG_SYS_CMA_MB_BASE+0x0000000)
 #define CMA_MB_RAM_SIZE		0x2000000	/* dip sws set actual size */
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_SLOT1)
-#define CMA_MB_SLOT1_BASE	(CFG_CMA_MB_BASE+0x2000000)
+#define CMA_MB_SLOT1_BASE	(CONFIG_SYS_CMA_MB_BASE+0x2000000)
 #define CMA_MB_SLOT1_SIZE	0x2000000
 #endif
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_SLOT2)
-#define CMA_MB_SLOT2_BASE	(CFG_CMA_MB_BASE+0x4000000)
+#define CMA_MB_SLOT2_BASE	(CONFIG_SYS_CMA_MB_BASE+0x4000000)
 #define CMA_MB_SLOT2_SIZE	0x2000000
 #endif
 #if (CMA_MB_CAPS & CMA_MB_CAP_PCI)
-#define CMA_MB_STDPCI_BASE	(CFG_CMA_MB_BASE+0x4000000)
+#define CMA_MB_STDPCI_BASE	(CONFIG_SYS_CMA_MB_BASE+0x4000000)
 #define CMA_MB_STDPCI_SIZE	0x1ff0000
-#define CMA_MB_V360EPC_BASE	(CFG_CMA_MB_BASE+0x5ff0000)
+#define CMA_MB_V360EPC_BASE	(CONFIG_SYS_CMA_MB_BASE+0x5ff0000)
 #define CMA_MB_V360EPC_SIZE	0x10000
 #endif
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_SLOT3)
-#define CMA_MB_SLOT3_BASE	(CFG_CMA_MB_BASE+0x6000000)
+#define CMA_MB_SLOT3_BASE	(CONFIG_SYS_CMA_MB_BASE+0x6000000)
 #define CMA_MB_SLOT3_SIZE	0x2000000
 #endif
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_PCI_EXT)
-#define CMA_MB_EXTPCI_BASE	(CFG_CMA_MB_BASE+0xa000000)
+#define CMA_MB_EXTPCI_BASE	(CONFIG_SYS_CMA_MB_BASE+0xa000000)
 #define CMA_MB_EXTPCI_SIZE	0x4000000
 #endif
 
-#define CMA_MB_ROMLOW_BASE	(CFG_CMA_MB_BASE+0xe000000)
+#define CMA_MB_ROMLOW_BASE	(CONFIG_SYS_CMA_MB_BASE+0xe000000)
 #define CMA_MB_ROMLOW_SIZE	0x800000
 #if (CMA_MB_CAPS & CMA_MB_CAP_FLASH)
-#define CMA_MB_FLLOW_EXEC_BASE	(CFG_CMA_MB_BASE+0xe000000)
+#define CMA_MB_FLLOW_EXEC_BASE	(CONFIG_SYS_CMA_MB_BASE+0xe000000)
 #define CMA_MB_FLLOW_EXEC_SIZE	0x100000
-#define CMA_MB_FLLOW_RDWR_BASE	(CFG_CMA_MB_BASE+0xe400000)
+#define CMA_MB_FLLOW_RDWR_BASE	(CONFIG_SYS_CMA_MB_BASE+0xe400000)
 #define CMA_MB_FLLOW_RDWR_SIZE	0x400000
 #endif
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_RTC)
-#define CMA_MB_RTC_BASE		(CFG_CMA_MB_BASE+0xe800000)
+#define CMA_MB_RTC_BASE		(CONFIG_SYS_CMA_MB_BASE+0xe800000)
 #define CMA_MB_RTC_SIZE		0x4000
 #endif
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
-#define CMA_MB_SERPAR_BASE	(CFG_CMA_MB_BASE+0xe900000)
+#define CMA_MB_SERPAR_BASE	(CONFIG_SYS_CMA_MB_BASE+0xe900000)
 #define   CMA_MB_SERIALB_BASE	  (CMA_MB_SERPAR_BASE+0x00)
 #define   CMA_MB_SERIALA_BASE	  (CMA_MB_SERPAR_BASE+0x40)
 #define   CMA_MB_PARALLEL_BASE	  (CMA_MB_SERPAR_BASE+0x80)
@@ -121,20 +121,20 @@
 #endif
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_KBM)
-#define CMA_MB_PKBM_BASE	(CFG_CMA_MB_BASE+0xe900100)
+#define CMA_MB_PKBM_BASE	(CONFIG_SYS_CMA_MB_BASE+0xe900100)
 #define CMA_MB_PKBM_SIZE	0x10
 #endif
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_LCD)
-#define CMA_MB_LCD_BASE		(CFG_CMA_MB_BASE+0xeb00000)
+#define CMA_MB_LCD_BASE		(CONFIG_SYS_CMA_MB_BASE+0xeb00000)
 #define CMA_MB_LCD_SIZE		0x10
 #endif
 
-#define CMA_MB_DIPSW_BASE	(CFG_CMA_MB_BASE+0xec00000)
+#define CMA_MB_DIPSW_BASE	(CONFIG_SYS_CMA_MB_BASE+0xec00000)
 #define CMA_MB_DIPSW_SIZE	0x10
 
 #if (CMA_MB_CAPS & (CMA_MB_CAP_SLOT1|CMA_MB_CAP_SER2|CMA_MB_CAP_KBM))
-#define CMA_MB_SLOT1CFG_BASE	(CFG_CMA_MB_BASE+0xf100000)
+#define CMA_MB_SLOT1CFG_BASE	(CONFIG_SYS_CMA_MB_BASE+0xf100000)
 #if (CMA_MB_CAPS & CMA_MB_CAP_SER2)
 #define   CMA_MB_SER2_BASE	  (CMA_MB_SLOT1CFG_BASE+0x80)
 #define     CMA_MB_SER2B_BASE	    (CMA_MB_SER2_BASE+0x00)
@@ -152,7 +152,7 @@
 #endif
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_SLOT2)
-#define CMA_MB_SLOT2CFG_BASE	(CFG_CMA_MB_BASE+0xf200000)
+#define CMA_MB_SLOT2CFG_BASE	(CONFIG_SYS_CMA_MB_BASE+0xf200000)
 #if defined(CONFIG_CMA302) && defined(CONFIG_CMA302_SLOT2)
 #define   CMA_MB_S2KBM_BASE	  (CMA_MB_SLOT2CFG_BASE+0x200)
 #endif
@@ -160,7 +160,7 @@
 #endif
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_PCI)
-#define CMA_MB_PCICTL_BASE	(CFG_CMA_MB_BASE+0xf200000)
+#define CMA_MB_PCICTL_BASE	(CONFIG_SYS_CMA_MB_BASE+0xf200000)
 #define   CMA_MB_PCI_V3CTL_BASE	  (CMA_MB_PCICTL_BASE+0x100)
 #define   CMA_MB_PCI_IDSEL_BASE	  (CMA_MB_PCICTL_BASE+0x200)
 #define   CMA_MB_PCI_IMASK_BASE	  (CMA_MB_PCICTL_BASE+0x300)
@@ -171,19 +171,19 @@
 #endif
 
 #if (CMA_MB_CAPS & CMA_MB_CAP_SLOT3)
-#define CMA_MB_SLOT3CFG_BASE	(CFG_CMA_MB_BASE+0xf300000)
+#define CMA_MB_SLOT3CFG_BASE	(CONFIG_SYS_CMA_MB_BASE+0xf300000)
 #if defined(CONFIG_CMA302) && defined(CONFIG_CMA302_SLOT3)
 #define   CMA_MB_S3KBM_BASE	  (CMA_MB_SLOT3CFG_BASE+0x200)
 #endif
 #define CMA_MB_SLOT3CFG_SIZE	0x400
 #endif
 
-#define CMA_MB_ROMHIGH_BASE	(CFG_CMA_MB_BASE+0xf800000)
+#define CMA_MB_ROMHIGH_BASE	(CONFIG_SYS_CMA_MB_BASE+0xf800000)
 #define CMA_MB_ROMHIGH_SIZE	0x800000
 #if (CMA_MB_CAPS & CMA_MB_CAP_FLASH)
-#define CMA_MB_FLHIGH_EXEC_BASE	(CFG_CMA_MB_BASE+0xf800000)
+#define CMA_MB_FLHIGH_EXEC_BASE	(CONFIG_SYS_CMA_MB_BASE+0xf800000)
 #define CMA_MB_FLHIGH_EXEC_SIZE	0x100000
-#define CMA_MB_FLHIGH_RDWR_BASE	(CFG_CMA_MB_BASE+0xfc00000)
+#define CMA_MB_FLHIGH_RDWR_BASE	(CONFIG_SYS_CMA_MB_BASE+0xfc00000)
 #define CMA_MB_FLHIGH_RDWR_SIZE	0x400000
 #endif