Add GPIO parsing on coreboot+uboot combo

BUG=chrome-os-partner:3912
TEST=run vboot_twostop and see cros_gpio output

Change-Id: Ic926765afa5b7d56ed475dc4c9e39a0dc99bcdf0
Reviewed-on: http://gerrit.chromium.org/gerrit/5292
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>

1 files changed, 59 insertions, 4 deletions

diff --git a/board/chromebook-x86/chromeos/cros_gpio.c b/board/chromebook-x86/chromeos/cros_gpio.c
index 3d0f733f5b3..a7fe3c540a1 100644
--- a/board/chromebook-x86/chromeos/cros_gpio.c
+++ b/board/chromebook-x86/chromeos/cros_gpio.c
@@ -10,17 +10,72 @@
 
 /* Implementation of per-board GPIO accessor functions */
 
-#include <chromeos/cros_gpio.h>
 #include <common.h>
+#include <asm/ic/coreboot/ipchecksum.h>
+#include <asm/ic/coreboot/sysinfo.h>
+#include <asm/ic/coreboot/tables.h>
+#include <chromeos/common.h>
+#include <chromeos/cros_gpio.h>
+#define PREFIX "cros_gpio: "
+
+DECLARE_GLOBAL_DATA_PTR;
 
 int cros_gpio_fetch(enum cros_gpio_index index, cros_gpio_t *gpio)
 {
-	printf("cros_gpio_fetch used but not implemented.\n");
-	return 0;
+	const char const *name[CROS_GPIO_MAX_GPIO] = {
+		"write protect",
+		"recovery",
+		"developer",
+		"lid",
+		"power",
+	};
+
+	int i;
+
+	if (index < 0 || index >= CROS_GPIO_MAX_GPIO) {
+		VBDEBUG(PREFIX "index out of range: %d\n", index);
+		return -1;
+	}
+
+	for (i = 0; i < lib_sysinfo.num_gpios; i++) {
+		int p;
+
+		if (strncmp((char *)lib_sysinfo.gpios[i].name, name[index],
+						GPIO_MAX_NAME_LENGTH))
+			continue;
+
+		/* Entry found */
+		gpio->index = index;
+		gpio->port = lib_sysinfo.gpios[i].port;
+		gpio->polarity = lib_sysinfo.gpios[i].polarity;
+		gpio->value = lib_sysinfo.gpios[i].value;
+
+		p = (gpio->polarity == CROS_GPIO_ACTIVE_HIGH) ? 0 : 1;
+		gpio->value = p ^ gpio->value;
+
+		return 0;
+	}
+
+	VBDEBUG(PREFIX "failed to find gpio port\n");
+	return -1;
 }
 
 int cros_gpio_dump(cros_gpio_t *gpio)
 {
-	printf("cros_gpio_dump used but not implemented.\n");
+#ifdef VBOOT_DEBUG
+	const char const *name[CROS_GPIO_MAX_GPIO] = {
+		"wpsw", "recsw", "devsw", "lidsw", "pwrsw"
+	};
+	int index = gpio->index;
+
+	if (index < 0 || index >= CROS_GPIO_MAX_GPIO) {
+		VBDEBUG(PREFIX "index out of range: %d\n", index);
+		return -1;
+	}
+
+	VBDEBUG(PREFIX "%-6s: port=%3d, polarity=%d, value=%d\n",
+			name[gpio->index],
+			gpio->port, gpio->polarity, gpio->value);
+#endif
 	return 0;
 }