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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-10-16 15:01:15 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/canmb
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/canmb')
-rw-r--r--board/canmb/canmb.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/board/canmb/canmb.c b/board/canmb/canmb.c
index d3711d07799..dce07bf785a 100644
--- a/board/canmb/canmb.c
+++ b/board/canmb/canmb.c
@@ -34,7 +34,7 @@
#include "mt48lc16m32s2-75.h"
#endif
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
static void sdram_start (int hi_addr)
{
long hi_addr_bit = hi_addr ? 0x01000000 : 0;
@@ -77,7 +77,7 @@ static void sdram_start (int hi_addr)
/*
* ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
+ * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
* is something else than 0x00000000.
*/
@@ -86,7 +86,7 @@ phys_size_t initdram (int board_type)
{
ulong dramsize = 0;
ulong dramsize2 = 0;
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
ulong test1, test2;
/* setup SDRAM chip selects */
@@ -107,9 +107,9 @@ phys_size_t initdram (int board_type)
/* find RAM size using SDRAM CS0 only */
sdram_start(0);
- test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+ test1 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
sdram_start(1);
- test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+ test2 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
if (test1 > test2) {
sdram_start(0);
dramsize = test1;
@@ -135,10 +135,10 @@ phys_size_t initdram (int board_type)
/* find RAM size using SDRAM CS1 only */
if (!dramsize)
sdram_start(0);
- test2 = test1 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
+ test2 = test1 = get_ram_size((ulong *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000);
if (!dramsize) {
sdram_start(1);
- test2 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
+ test2 = get_ram_size((ulong *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000);
}
if (test1 > test2) {
sdram_start(0);
@@ -160,7 +160,7 @@ phys_size_t initdram (int board_type)
*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
}
-#else /* CFG_RAMBOOT */
+#else /* CONFIG_SYS_RAMBOOT */
/* retrieve size of memory connected to SDRAM CS0 */
dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
@@ -178,7 +178,7 @@ phys_size_t initdram (int board_type)
dramsize2 = 0;
}
-#endif /* CFG_RAMBOOT */
+#endif /* CONFIG_SYS_RAMBOOT */
return dramsize + dramsize2;
}
@@ -188,7 +188,7 @@ phys_size_t initdram (int board_type)
phys_size_t initdram (int board_type)
{
ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
ulong test1, test2;
/* setup and enable SDRAM chip selects */
@@ -207,9 +207,9 @@ phys_size_t initdram (int board_type)
/* find RAM size */
sdram_start(0);
- test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+ test1 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
sdram_start(1);
- test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+ test2 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
if (test1 > test2) {
sdram_start(0);
dramsize = test1;
@@ -220,12 +220,12 @@ phys_size_t initdram (int board_type)
/* set SDRAM end address according to size */
*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-#else /* CFG_RAMBOOT */
+#else /* CONFIG_SYS_RAMBOOT */
/* Retrieve amount of SDRAM available */
dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-#endif /* CFG_RAMBOOT */
+#endif /* CONFIG_SYS_RAMBOOT */
return dramsize;
}
@@ -244,8 +244,8 @@ int board_early_init_r (void)
{
*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
*(vu_long *)MPC5XXX_BOOTCS_START =
- *(vu_long *)MPC5XXX_CS0_START = START_REG(CFG_FLASH_BASE);
+ *(vu_long *)MPC5XXX_CS0_START = START_REG(CONFIG_SYS_FLASH_BASE);
*(vu_long *)MPC5XXX_BOOTCS_STOP =
- *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CFG_FLASH_BASE, CFG_FLASH_SIZE);
+ *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE);
return 0;
}