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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-10-16 15:01:15 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/bf533-ezkit
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/bf533-ezkit')
-rw-r--r--board/bf533-ezkit/bf533-ezkit.c14
-rw-r--r--board/bf533-ezkit/flash-defines.h4
-rw-r--r--board/bf533-ezkit/flash.c22
-rw-r--r--board/bf533-ezkit/psd4256.h8
-rw-r--r--board/bf533-ezkit/u-boot.lds.S4
5 files changed, 26 insertions, 26 deletions
diff --git a/board/bf533-ezkit/bf533-ezkit.c b/board/bf533-ezkit/bf533-ezkit.c
index 583560adb32..42c4b505551 100644
--- a/board/bf533-ezkit/bf533-ezkit.c
+++ b/board/bf533-ezkit/bf533-ezkit.c
@@ -50,12 +50,12 @@ phys_size_t initdram(int board_type)
printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
"tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
3, 3, 6, 2, 3);
- printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
- printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE >> 20);
+ printf("SDRAM Begin: 0x%x\n", CONFIG_SYS_SDRAM_BASE);
+ printf("Bank size = %d MB\n", CONFIG_SYS_MAX_RAM_SIZE >> 20);
#endif
- gd->bd->bi_memstart = CFG_SDRAM_BASE;
- gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
- return CFG_MAX_RAM_SIZE;
+ gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
+ return CONFIG_SYS_MAX_RAM_SIZE;
}
#if defined(CONFIG_MISC_INIT_R)
@@ -63,10 +63,10 @@ phys_size_t initdram(int board_type)
int misc_init_r(void)
{
/* Set direction bits for Video en/decoder reset as output */
- *(volatile unsigned char *)(CFG_FLASH1_BASE + PSD_PORTA_DIR) =
+ *(volatile unsigned char *)(CONFIG_SYS_FLASH1_BASE + PSD_PORTA_DIR) =
PSDA_VDEC_RST | PSDA_VENC_RST;
/* Deactivate Video en/decoder reset lines */
- *(volatile unsigned char *)(CFG_FLASH1_BASE + PSD_PORTA_DOUT) =
+ *(volatile unsigned char *)(CONFIG_SYS_FLASH1_BASE + PSD_PORTA_DOUT) =
PSDA_VDEC_RST | PSDA_VENC_RST;
return 0;
diff --git a/board/bf533-ezkit/flash-defines.h b/board/bf533-ezkit/flash-defines.h
index 4e043e072b7..1a4aa5f2f70 100644
--- a/board/bf533-ezkit/flash-defines.h
+++ b/board/bf533-ezkit/flash-defines.h
@@ -49,10 +49,10 @@
#define FLASH_TOT_SECT 40
#define FLASH_SIZE 0x220000
#define FLASH_MAN_ST 2
-#define CFG_FLASH0_BASE 0x20000000
+#define CONFIG_SYS_FLASH0_BASE 0x20000000
#define RESET_VAL 0xF0
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
int get_codes(void);
int poll_toggle_bit(long lOffset);
diff --git a/board/bf533-ezkit/flash.c b/board/bf533-ezkit/flash.c
index cdf4dc69ba4..a861e16a3df 100644
--- a/board/bf533-ezkit/flash.c
+++ b/board/bf533-ezkit/flash.c
@@ -82,7 +82,7 @@ unsigned long flash_init(void)
size_b0 = size_b1 = size_b2 = 0;
#ifdef DEBUG
- printf("Flash Memory Start 0x%x\n", CFG_FLASH_BASE);
+ printf("Flash Memory Start 0x%x\n", CONFIG_SYS_FLASH_BASE);
printf("Memory Map for the Flash\n");
printf("0x20000000 - 0x200FFFFF Flash A Primary (1MB)\n");
printf("0x20100000 - 0x201FFFFF Flash B Primary (1MB)\n");
@@ -90,20 +90,20 @@ unsigned long flash_init(void)
printf("0x20280000 - 0x2028FFFF Flash B Secondary (64KB)\n");
printf("Please type command flinfo for information on Sectors \n");
#endif
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
+ for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
- size_b0 = flash_get_size(CFG_FLASH0_BASE, &flash_info[0], 0);
- size_b1 = flash_get_size(CFG_FLASH0_BASE, &flash_info[1], 1);
- size_b2 = flash_get_size(CFG_FLASH0_BASE, &flash_info[2], 2);
+ size_b0 = flash_get_size(CONFIG_SYS_FLASH0_BASE, &flash_info[0], 0);
+ size_b1 = flash_get_size(CONFIG_SYS_FLASH0_BASE, &flash_info[1], 1);
+ size_b2 = flash_get_size(CONFIG_SYS_FLASH0_BASE, &flash_info[2], 2);
if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) {
printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0 >> 20);
}
- (void)flash_protect(FLAG_PROTECT_SET, CFG_FLASH0_BASE,
+ (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_FLASH0_BASE,
(flash_info[0].start[2] - 1), &flash_info[0]);
return (size_b0 + size_b1 + size_b2);
@@ -180,7 +180,7 @@ int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
int ret;
int d;
if (addr % 2) {
- read_flash(addr - 1 - CFG_FLASH_BASE, &d);
+ read_flash(addr - 1 - CONFIG_SYS_FLASH_BASE, &d);
d = (int)((d & 0x00FF) | (*src++ << 8));
ret = write_data(addr - 1, 2, (uchar *) & d);
if (ret == FLASH_FAIL)
@@ -196,7 +196,7 @@ int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
int write_data(long lStart, long lCount, uchar * pnData)
{
long i = 0;
- unsigned long ulOffset = lStart - CFG_FLASH_BASE;
+ unsigned long ulOffset = lStart - CONFIG_SYS_FLASH_BASE;
int d;
int nSector = 0;
int flag = 0;
@@ -285,7 +285,7 @@ int write_flash(long nOffset, int nValue)
{
long addr;
- addr = (CFG_FLASH_BASE + nOffset);
+ addr = (CONFIG_SYS_FLASH_BASE + nOffset);
SSYNC();
*(unsigned volatile short *)addr = nValue;
SSYNC();
@@ -297,7 +297,7 @@ int write_flash(long nOffset, int nValue)
int read_flash(long nOffset, int *pnValue)
{
int nValue = 0x0;
- long addr = (CFG_FLASH_BASE + nOffset);
+ long addr = (CONFIG_SYS_FLASH_BASE + nOffset);
if (nOffset != 0x2)
reset_flash();
@@ -396,7 +396,7 @@ int erase_block_flash(int nBlock, unsigned long address)
if ((nBlock < 0) || (nBlock > AFP_NumSectors))
return FALSE;
- ulSectorOff = (address - CFG_FLASH_BASE);
+ ulSectorOff = (address - CONFIG_SYS_FLASH_BASE);
write_flash((WRITESEQ1 | ulSectorOff), WRITEDATA1);
write_flash((WRITESEQ2 | ulSectorOff), WRITEDATA2);
diff --git a/board/bf533-ezkit/psd4256.h b/board/bf533-ezkit/psd4256.h
index cc654b89561..9b381d27fec 100644
--- a/board/bf533-ezkit/psd4256.h
+++ b/board/bf533-ezkit/psd4256.h
@@ -27,8 +27,8 @@
/*
* Flash A/B Port A configuration registers.
- * Addresses are offset values to CFG_FLASH1_BASE
- * for Flash A and CFG_FLASH2_BASE for Flash B.
+ * Addresses are offset values to CONFIG_SYS_FLASH1_BASE
+ * for Flash A and CONFIG_SYS_FLASH2_BASE for Flash B.
*/
#define PSD_PORTA_DIN 0x070000
@@ -37,8 +37,8 @@
/*
* Flash A/B Port B configuration registers
- * Addresses are offset values to CFG_FLASH1_BASE
- * for Flash A and CFG_FLASH2_BASE for Flash B.
+ * Addresses are offset values to CONFIG_SYS_FLASH1_BASE
+ * for Flash A and CONFIG_SYS_FLASH2_BASE for Flash B.
*/
#define PSD_PORTB_DIN 0x070001
diff --git a/board/bf533-ezkit/u-boot.lds.S b/board/bf533-ezkit/u-boot.lds.S
index 1fedbc5fb7b..538a19f81b4 100644
--- a/board/bf533-ezkit/u-boot.lds.S
+++ b/board/bf533-ezkit/u-boot.lds.S
@@ -36,7 +36,7 @@
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
-# define L1_DATA_B_SRAM CFG_MONITOR_BASE
+# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
@@ -45,7 +45,7 @@ OUTPUT_ARCH(bfin)
/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
MEMORY
{
- ram : ORIGIN = CFG_MONITOR_BASE, LENGTH = CFG_MONITOR_LEN
+ ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM+0xC, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}