board: at91sam9x5ek: Convert to CONFIG_DM_VIDEO

Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

1 files changed, 7 insertions, 104 deletions

diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
index be6dd4a6d3..d69831ad15 100644
--- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
@@ -13,12 +13,6 @@
 #include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <debug_uart.h>
-#include <lcd.h>
-#include <atmel_hlcdc.h>
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
-#endif
 #include <asm/mach-types.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -86,103 +80,15 @@ static void at91sam9x5ek_nand_hw_init(void)
 }
 #endif
 
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
-	.vl_col	= 800,
-	.vl_row = 480,
-	.vl_clk = 24000000,
-	.vl_sync = LCDC_LCDCFG5_HSPOL | LCDC_LCDCFG5_VSPOL,
-	.vl_bpix = LCD_BPP,
-	.vl_tft = 1,
-	.vl_clk_pol = 1,
-	.vl_hsync_len = 128,
-	.vl_left_margin = 64,
-	.vl_right_margin = 64,
-	.vl_vsync_len = 2,
-	.vl_upper_margin = 22,
-	.vl_lower_margin = 21,
-	.mmio = ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
-	if (has_lcdc())
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 1);	/* power up */
-}
-
-void lcd_disable(void)
-{
-	if (has_lcdc())
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 0);	/* power down */
-}
-
-static void at91sam9x5ek_lcd_hw_init(void)
-{
-	if (has_lcdc()) {
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 26, 0);	/* LCDPWM */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 27, 0);	/* LCDVSYNC */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 28, 0);	/* LCDHSYNC */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 24, 0);	/* LCDDISP */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 0);	/* LCDDEN */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 30, 0);	/* LCDPCK */
-
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 0, 0);	/* LCDD0 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* LCDD1 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 2, 0);	/* LCDD2 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 3, 0);	/* LCDD3 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 4, 0);	/* LCDD4 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 5, 0);	/* LCDD5 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 6, 0);	/* LCDD6 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 7, 0);	/* LCDD7 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 8, 0);	/* LCDD8 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 9, 0);	/* LCDD9 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 10, 0);	/* LCDD10 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 11, 0);	/* LCDD11 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 12, 0);	/* LCDD12 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 13, 0);	/* LCDD13 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 14, 0);	/* LCDD14 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 15, 0);	/* LCDD15 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 16, 0);	/* LCDD16 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 17, 0);	/* LCDD17 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 18, 0);	/* LCDD18 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 19, 0);	/* LCDD19 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 20, 0);	/* LCDD20 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 21, 0);	/* LCDD21 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 22, 0);	/* LCDD22 */
-		at91_pio3_set_a_periph(AT91_PIO_PORTC, 23, 0);	/* LCDD23 */
-
-		at91_periph_clk_enable(ATMEL_ID_LCDC);
-	}
-}
-
-#ifdef CONFIG_LCD_INFO
-void lcd_show_board_info(void)
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
 {
-	ulong dram_size, nand_size;
-	int i;
-	char temp[32];
-
-	if (has_lcdc()) {
-		lcd_printf("%s\n", U_BOOT_VERSION);
-		lcd_printf("(C) 2012 ATMEL Corp\n");
-		lcd_printf("at91support@atmel.com\n");
-		lcd_printf("%s CPU at %s MHz\n",
-			get_cpu_name(),
-			strmhz(temp, get_cpu_clk_rate()));
-
-		dram_size = 0;
-		for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
-			dram_size += gd->bd->bi_dram[i].size;
-		nand_size = 0;
-		for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
-			nand_size += get_nand_dev_by_index(i)->size;
-		lcd_printf("  %ld MB SDRAM, %ld MB NAND\n",
-			dram_size >> 20,
-			nand_size >> 20);
-	}
+#ifdef CONFIG_DM_VIDEO
+	at91_video_show_board_info();
+#endif
+	return 0;
 }
-#endif /* CONFIG_LCD_INFO */
-#endif /* CONFIG_LCD */
+#endif
 
 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
 void board_debug_uart_init(void)
@@ -216,9 +122,6 @@ int board_init(void)
 #if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI_HCD)
 	at91_uhp_hw_init();
 #endif
-#ifdef CONFIG_LCD
-	at91sam9x5ek_lcd_hw_init();
-#endif
 	return 0;
 }