diff options
| author | Eugen Hristev <eugen.hristev@microchip.com> | 2018-04-24 10:43:53 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-05-08 09:07:36 -0400 |
| commit | 23dd6015ce531da66025782b8db366aee5b47926 (patch) | |
| tree | 8598da0c57dba4282ddca6ac93f58672e173bc54 /board/atmel | |
| parent | 8ee54672df3d569e3e916b5fa270fab62df36cc4 (diff) | |
board: sama5d2_ptc_ek: adjust the smc timings of nand
To fix the issue of write the rootfs.ubi, adjust the smc timings
configuration of the nand controller.
Based on original work by Wenyou Yang
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Diffstat (limited to 'board/atmel')
| -rw-r--r-- | board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c index 206e858b32..789841e45a 100644 --- a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c +++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c @@ -33,10 +33,10 @@ static void board_nand_hw_init(void) writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) | AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1), &smc->cs[3].setup); - writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(3) | + writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(4) | AT91_SMC_PULSE_NRD(2) | AT91_SMC_PULSE_NCS_RD(3), &smc->cs[3].pulse); - writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + writel(AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(5), &smc->cs[3].cycle); writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) | AT91_SMC_TIMINGS_TAR(2) | AT91_SMC_TIMINGS_TRR(3) | |