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authorStefan Roese <sr@denx.de>2005-11-01 10:08:03 +0100
committerStefan Roese <sr@denx.de>2005-11-01 10:08:03 +0100
commit57275b69c6cdb5ed37c4cdece3cda56487ca4b0c (patch)
tree97ab5ef11ce24368bbc4d0a38f278b5c5d6b65f0 /board/amcc/ocotea/ocotea.c
parentd9f2f5008c32c8373d68a4c8e14f50a469965a23 (diff)
Add support for Ocotea pass 3 with 440GX Rev. F
Patch by Stefan Roese, 01 Nov 2005
Diffstat (limited to 'board/amcc/ocotea/ocotea.c')
-rw-r--r--board/amcc/ocotea/ocotea.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c
index 5b28c3b1783..3926109bd57 100644
--- a/board/amcc/ocotea/ocotea.c
+++ b/board/amcc/ocotea/ocotea.c
@@ -506,6 +506,15 @@ void fpga_init(void)
}
}
+ /*
+ * new Ocotea with Rev. F (pass 3) chips has SMII PHY reset
+ */
+ if ((in8(FPGA_REG0) & FPGA_REG0_ECLS_MASK) == FPGA_REG0_ECLS_VER2) {
+ out8(FPGA_REG2, in8(FPGA_REG2) & ~FPGA_REG2_SMII_RESET_DISABLE);
+ udelay(10000);
+ out8(FPGA_REG2, in8(FPGA_REG2) | FPGA_REG2_SMII_RESET_DISABLE);
+ }
+
/* Turn off the LED's */
out8(FPGA_REG3, (in8(FPGA_REG3) & ~FPGA_REG3_STAT_MASK) |
FPGA_REG3_STAT_LED8_DISAB | FPGA_REG3_STAT_LED4_DISAB |