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authorRick Chen <rick@andestech.com>2017-12-26 13:55:53 +0800
committerTom Rini <trini@konsulko.com>2018-01-12 08:05:12 -0500
commit7885ea85689051bdbcfb51780ec64bce71782bc7 (patch)
treebaf61232d3d6c894ab2a2319dd04949adead5879 /board/AndesTech
parentf94c44e51e4ffc45d727c6b3d9ead0cb83171f91 (diff)
riscv: board: Add nx25-ae250 to support RISC-V
Add nx25-ae250 board to do platform initializations. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
Diffstat (limited to 'board/AndesTech')
-rw-r--r--board/AndesTech/nx25-ae250/Kconfig24
-rw-r--r--board/AndesTech/nx25-ae250/MAINTAINERS6
-rw-r--r--board/AndesTech/nx25-ae250/Makefile8
-rw-r--r--board/AndesTech/nx25-ae250/nx25-ae250.c77
4 files changed, 115 insertions, 0 deletions
diff --git a/board/AndesTech/nx25-ae250/Kconfig b/board/AndesTech/nx25-ae250/Kconfig
new file mode 100644
index 0000000000..2fb3234bad
--- /dev/null
+++ b/board/AndesTech/nx25-ae250/Kconfig
@@ -0,0 +1,24 @@
+if TARGET_NX25_AE250
+
+config SYS_CPU
+ default "nx25"
+
+config SYS_BOARD
+ default "nx25-ae250"
+
+config SYS_VENDOR
+ default "AndesTech"
+
+config SYS_SOC
+ default "ae250"
+
+config SYS_CONFIG_NAME
+ default "nx25-ae250"
+
+config ENV_SIZE
+ default 0x2000 if ENV_IS_IN_SPI_FLASH
+
+config ENV_OFFSET
+ default 0x140000 if ENV_IS_IN_SPI_FLASH
+
+endif
diff --git a/board/AndesTech/nx25-ae250/MAINTAINERS b/board/AndesTech/nx25-ae250/MAINTAINERS
new file mode 100644
index 0000000000..1bff127c64
--- /dev/null
+++ b/board/AndesTech/nx25-ae250/MAINTAINERS
@@ -0,0 +1,6 @@
+NX25-AE250 BOARD
+M: Rick Chen <rick@andestech.com>
+S: Maintained
+F: board/AndesTech/nx25-ae250/
+F: include/configs/nx25-ae250.h
+F: configs/nx25-ae250_defconfig
diff --git a/board/AndesTech/nx25-ae250/Makefile b/board/AndesTech/nx25-ae250/Makefile
new file mode 100644
index 0000000000..66b681492c
--- /dev/null
+++ b/board/AndesTech/nx25-ae250/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2017 Andes Technology Corporation.
+# Rick Chen, Andes Technology Corporation <rick@andestech.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := nx25-ae250.o
diff --git a/board/AndesTech/nx25-ae250/nx25-ae250.c b/board/AndesTech/nx25-ae250/nx25-ae250.c
new file mode 100644
index 0000000000..12f2d3520b
--- /dev/null
+++ b/board/AndesTech/nx25-ae250/nx25-ae250.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2017 Andes Technology Corporation
+ * Rick Chen, Andes Technology Corporation <rick@andestech.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/mach-types.h>
+#include <common.h>
+#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
+#include <netdev.h>
+#endif
+#include <linux/io.h>
+#include <faraday/ftsdc010.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscellaneous platform dependent initializations
+ */
+
+int board_init(void)
+{
+ gd->bd->bi_arch_number = MACH_TYPE_AE250;
+ gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ unsigned long sdram_base = PHYS_SDRAM_0;
+ unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
+ unsigned long actual_size;
+
+ actual_size = get_ram_size((void *)sdram_base, expected_size);
+ gd->ram_size = actual_size;
+
+ if (expected_size != actual_size) {
+ printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
+ actual_size >> 20, expected_size >> 20);
+ }
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
+int board_eth_init(bd_t *bd)
+{
+ return ftmac100_initialize(bd);
+}
+#endif
+
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
+{
+ return 0;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+#ifndef CONFIG_DM_MMC
+#ifdef CONFIG_FTSDC010
+ ftsdc010_mmc_init(0);
+#endif
+#endif
+ return 0;
+}