diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-08-09 17:55:11 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-08-12 10:16:58 +0200 |
| commit | 1cf83224ac11e2ea1a0b3546b27ecd9a59fac247 (patch) | |
| tree | 5dc5de2cbfc4570561fd78c4356bdfc823a97261 /arch | |
| parent | 658a5957747cd3f2d1d90f4983fec28a116851cd (diff) | |
apalis/colibri_t30: implement memory size auto detection
In preparation for the new Apalis T30 SKUs implement memory size auto
detection based on reading the aperture register set by boot ROM from
BCT and a simple mirroring detection.
Tested on initial samples of Apalis T30 1GB V1.0A,
Apalis T30 2GB V1.0B, Apalis T30 2GB V1.0C and Colibri T30 V1.1C.
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/tegra-common/board.c | 34 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/tegra.h | 2 |
2 files changed, 34 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/tegra-common/board.c b/arch/arm/cpu/armv7/tegra-common/board.c index 4dbd1398387..c2c8be3b9fe 100644 --- a/arch/arm/cpu/armv7/tegra-common/board.c +++ b/arch/arm/cpu/armv7/tegra-common/board.c @@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR; unsigned int board_query_sdram_size(void) { -#ifndef CONFIG_COLIBRI_T20 +#if !defined(CONFIG_APALIS_T30) && !defined(CONFIG_COLIBRI_T20) && !defined(CONFIG_COLIBRI_T30) struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; u32 reg; @@ -63,7 +63,8 @@ unsigned int board_query_sdram_size(void) default: return 0x40000000; /* 1GB */ } -#else /* CONFIG_COLIBRI_T20 */ +#else /* !CONFIG_APALIS_T30 & !CONFIG_COLIBRI_T20 & !CONFIG_COLIBRI_T30 */ +#ifdef CONFIG_COLIBRI_T20 /* Colibri T20 does not use OdmData but rather relies on memory controller configuration done by boot ROM based on BCT information */ @@ -88,7 +89,36 @@ unsigned int board_query_sdram_size(void) }
return memsize; +#else /* CONFIG_COLIBRI_T20 */ + u32 *mc_emem_cfg = (void *)NV_PA_MC_EMEM_CFG_0; + + u32 reg = readl(mc_emem_cfg); + + /* Aperture in MB */ + u32 memsize = reg * 1024 * 1024; + + /* Unfortunately it is possible to at least boot a 1 GB module with + a 2 GB BCT therefore double check whether we really do have that + amount of physical memory */ + if (memsize > 1024*1024*1024) { + volatile u32 *pMem = (void *)((u32)2048*1024*1024); + u32 temp = pMem[0]; + pMem[0] = 0xabadcafe; + asm volatile("" ::: "memory"); + if (pMem[0] == pMem[1024*1024*1024/4]) + memsize = 0x40000000; /* 1GB */ + else + /* + * On tegra3, out of 2GB, 1MB(0xFFF00000 - FFFFFFFF) is used for + * Bootcode(IROM) and arm specific exception vector code. + */ + memsize = 0x7ff00000; /* 2GB - 1MB */ + pMem[0] = temp; + } + + return memsize; #endif /* CONFIG_COLIBRI_T20 */ +#endif /* !CONFIG_APALIS_T30 & !CONFIG_COLIBRI_T20 & !CONFIG_COLIBRI_T30 */ } #if defined(CONFIG_DISPLAY_BOARDINFO) || defined(CONFIG_DISPLAY_BOARDINFO_LATE) diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h index 73cd230e119..dc588ce6b23 100644 --- a/arch/arm/include/asm/arch-tegra/tegra.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -55,6 +55,8 @@ #define TEGRA_DVC_BASE 0x7000D000 #define TEGRA_KBC_BASE 0x7000E200 #define NV_PA_PMC_BASE 0x7000E400 +#define NV_PA_MC_BASE 0x7000F000 +#define NV_PA_MC_EMEM_CFG_0 (NV_PA_MC_BASE + 0x50) #define NV_PA_EMC_BASE 0x7000F400 #define NV_PA_EMC_ADR_CFG_BASE (NV_PA_EMC_BASE + 0x10) #define EMEM_DEVSIZE_MASK (0xf << EMEM_DEVSIZE_SHIFT) |