diff options
| author | Ye Li <ye.li@nxp.com> | 2018-10-28 22:41:49 -0700 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2018-10-29 00:21:19 -0700 |
| commit | cf568e253a523e894823edc6c70ae649546d7189 (patch) | |
| tree | 18bae4619085444807f5e1d4c872fc1f34a28ab4 /arch | |
| parent | e92d831e5b1e149b23aeb1774c57d076ac246b1e (diff) | |
MLK-20031-1 imx8qm/qxp: Update SCFW API to latest version
Update API files generated from latest SCFW commit:
commit b5dbcf59157cf758da2b96c395e3f4cb2674437f
Author: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Date: Sat Oct 27 02:04:47 2018 -0500
SCF-248 Fix Linux boot fail on iMX8QX
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'arch')
22 files changed, 1275 insertions, 619 deletions
diff --git a/arch/arm/include/asm/mach-imx/sci/ipc.h b/arch/arm/include/asm/mach-imx/sci/ipc.h index 7f17c6818b1..145df1db805 100755..100644 --- a/arch/arm/include/asm/mach-imx/sci/ipc.h +++ b/arch/arm/include/asm/mach-imx/sci/ipc.h @@ -61,7 +61,7 @@ void sc_ipc_read(sc_ipc_t ipc, void *data); * * This function will block if the outgoing buffer is full. */ -void sc_ipc_write(sc_ipc_t ipc, void *data); +void sc_ipc_write(sc_ipc_t ipc, const void *data); #endif /* SC_IPC_H */ diff --git a/arch/arm/include/asm/mach-imx/sci/rpc.h b/arch/arm/include/asm/mach-imx/sci/rpc.h index a88d5c4d9b0..f57ab4a86b0 100755..100644 --- a/arch/arm/include/asm/mach-imx/sci/rpc.h +++ b/arch/arm/include/asm/mach-imx/sci/rpc.h @@ -23,17 +23,17 @@ #define SC_RPC_MAX_MSG 8U -#define RPC_VER(MSG) ((MSG)->version) -#define RPC_SIZE(MSG) ((MSG)->size) -#define RPC_SVC(MSG) ((MSG)->svc) -#define RPC_FUNC(MSG) ((MSG)->func) -#define RPC_R8(MSG) ((MSG)->func) -#define RPC_I32(MSG, IDX) ((MSG)->DATA.i32[(IDX) / 4U]) -#define RPC_I16(MSG, IDX) ((MSG)->DATA.i16[(IDX) / 2U]) -#define RPC_I8(MSG, IDX) ((MSG)->DATA.i8[(IDX)]) -#define RPC_U32(MSG, IDX) ((MSG)->DATA.u32[(IDX) / 4U]) -#define RPC_U16(MSG, IDX) ((MSG)->DATA.u16[(IDX) / 2U]) -#define RPC_U8(MSG, IDX) ((MSG)->DATA.u8[(IDX)]) +#define RPC_VER(MESG) ((MESG)->version) +#define RPC_SIZE(MESG) ((MESG)->size) +#define RPC_SVC(MESG) ((MESG)->svc) +#define RPC_FUNC(MESG) ((MESG)->func) +#define RPC_R8(MESG) ((MESG)->func) +#define RPC_I32(MESG, IDX) ((MESG)->DATA.i32[(IDX) / 4U]) +#define RPC_I16(MESG, IDX) ((MESG)->DATA.i16[(IDX) / 2U]) +#define RPC_I8(MESG, IDX) ((MESG)->DATA.i8[(IDX)]) +#define RPC_U32(MESG, IDX) ((MESG)->DATA.u32[(IDX) / 4U]) +#define RPC_U16(MESG, IDX) ((MESG)->DATA.u16[(IDX) / 2U]) +#define RPC_U8(MESG, IDX) ((MESG)->DATA.u8[(IDX)]) #define SC_RPC_SVC_UNKNOWN 0U #define SC_RPC_SVC_RETURN 1U @@ -55,6 +55,30 @@ #define SC_RPC_MU_GIR_SVC 0x1U #define SC_RPC_MU_GIR_DBG 0x8U +#define I8(X) ((int8_t) (X)) +#define I16(X) ((int16_t) (X)) +#define I32(X) ((int32_t) (X)) +#define I64(X) ((int64_t) (X)) +#define U8(X) ((uint8_t) (X)) +#define U16(X) ((uint16_t) (X)) +#define U32(X) ((uint32_t) (X)) +#define U64(X) ((uint64_t) (X)) + +#define PTR_I8(X) ((int8_t*) (X)) +#define PTR_I16(X) ((int16_t*) (X)) +#define PTR_I32(X) ((int32_t*) (X)) +#define PTR_I64(X) ((int64_t*) (X)) +#define PTR_U8(X) ((uint8_t*) (X)) +#define PTR_U16(X) ((uint16_t*) (X)) +#define PTR_U32(X) ((uint32_t*) (X)) +#define PTR_U64(X) ((uint64_t*) (X)) + +#define U2B(X) (((X) != 0U) ? SC_TRUE : SC_FALSE) +#define U2B32(X) (((X) != 0UL) ? SC_TRUE : SC_FALSE) +#define B2U8(X) (((X) != SC_FALSE) ? U8(0x01U) : U8(0x00U)) +#define B2U16(X) (((X) != SC_FALSE) ? U16(0x01U) : U16(0x00U)) +#define B2U32(X) (((X) != SC_FALSE) ? U32(0x01U) : U32(0x00U)) + /* Types */ typedef uint8_t sc_rpc_svc_t; diff --git a/arch/arm/include/asm/mach-imx/sci/svc/irq/api.h b/arch/arm/include/asm/mach-imx/sci/svc/irq/api.h index 4b07b271335..1508a23a3ad 100755..100644 --- a/arch/arm/include/asm/mach-imx/sci/svc/irq/api.h +++ b/arch/arm/include/asm/mach-imx/sci/svc/irq/api.h @@ -25,7 +25,7 @@ /* Defines */ -#define SC_IRQ_NUM_GROUP 4 /*!< Number of groups */ +#define SC_IRQ_NUM_GROUP 5U /*!< Number of groups */ /*! * @name Defines for sc_irq_group_t @@ -35,56 +35,64 @@ #define SC_IRQ_GROUP_WDOG 1U /*!< Watchdog interrupts */ #define SC_IRQ_GROUP_RTC 2U /*!< RTC interrupts */ #define SC_IRQ_GROUP_WAKE 3U /*!< Wakeup interrupts */ +#define SC_IRQ_GROUP_SYSCTR 4U /*!< System counter interrupts */ /*@}*/ /*! * @name Defines for sc_irq_temp_t */ /*@{*/ -#define SC_IRQ_TEMP_HIGH (1U << 0) /*!< Temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU0_HIGH (1U << 1) /*!< CPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU1_HIGH (1U << 2) /*!< CPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU0_HIGH (1U << 3) /*!< GPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU1_HIGH (1U << 4) /*!< GPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC0_HIGH (1U << 5) /*!< DRC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC1_HIGH (1U << 6) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_VPU_HIGH (1U << 7) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC0_HIGH (1U << 8) /*!< PMIC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC1_HIGH (1U << 9) /*!< PMIC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_LOW (1U << 10) /*!< Temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU0_LOW (1U << 11) /*!< CPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU1_LOW (1U << 12) /*!< CPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU0_LOW (1U << 13) /*!< GPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU1_LOW (1U << 14) /*!< GPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC0_LOW (1U << 15) /*!< DRC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC1_LOW (1U << 16) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_VPU_LOW (1U << 17) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC0_LOW (1U << 18) /*!< PMIC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC1_LOW (1U << 19) /*!< PMIC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC2_HIGH (1U << 20) /*!< PMIC2 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC2_LOW (1U << 21) /*!< PMIC2 temp alarm interrupt */ +#define SC_IRQ_TEMP_HIGH (1UL << 0U) /*!< Temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU0_HIGH (1UL << 1U) /*!< CPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU1_HIGH (1UL << 2U) /*!< CPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU0_HIGH (1UL << 3U) /*!< GPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU1_HIGH (1UL << 4U) /*!< GPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC0_HIGH (1UL << 5U) /*!< DRC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC1_HIGH (1UL << 6U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_VPU_HIGH (1UL << 7U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC0_HIGH (1UL << 8U) /*!< PMIC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC1_HIGH (1UL << 9U) /*!< PMIC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_LOW (1UL << 10U) /*!< Temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU0_LOW (1UL << 11U) /*!< CPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU1_LOW (1UL << 12U) /*!< CPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU0_LOW (1UL << 13U) /*!< GPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU1_LOW (1UL << 14U) /*!< GPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC0_LOW (1UL << 15U) /*!< DRC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC1_LOW (1UL << 16U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_VPU_LOW (1UL << 17U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC0_LOW (1UL << 18U) /*!< PMIC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC1_LOW (1UL << 19U) /*!< PMIC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC2_HIGH (1UL << 20U) /*!< PMIC2 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC2_LOW (1UL << 21U) /*!< PMIC2 temp alarm interrupt */ /*@}*/ /*! * @name Defines for sc_irq_wdog_t */ /*@{*/ -#define SC_IRQ_WDOG (1U << 0) /*!< Watchdog interrupt */ +#define SC_IRQ_WDOG (1U << 0U) /*!< Watchdog interrupt */ /*@}*/ /*! * @name Defines for sc_irq_rtc_t */ /*@{*/ -#define SC_IRQ_RTC (1U << 0) /*!< RTC interrupt */ +#define SC_IRQ_RTC (1U << 0U) /*!< RTC interrupt */ /*@}*/ /*! * @name Defines for sc_irq_wake_t */ /*@{*/ -#define SC_IRQ_BUTTON (1U << 0) /*!< Button interrupt */ -#define SC_IRQ_PAD (1U << 1) /*!< Pad wakeup */ +#define SC_IRQ_BUTTON (1U << 0U) /*!< Button interrupt */ +#define SC_IRQ_PAD (1U << 1U) /*!< Pad wakeup */ +/*@}*/ + +/*! + * @name Defines for sc_irq_sysctr_t + */ +/*@{*/ +#define SC_IRQ_SYSCTR (1U << 0U) /*!< SYSCTR interrupt */ /*@}*/ /* Types */ diff --git a/arch/arm/include/asm/mach-imx/sci/svc/misc/api.h b/arch/arm/include/asm/mach-imx/sci/svc/misc/api.h index 6b876bb128f..c271a2c15b0 100644 --- a/arch/arm/include/asm/mach-imx/sci/svc/misc/api.h +++ b/arch/arm/include/asm/mach-imx/sci/svc/misc/api.h @@ -30,7 +30,7 @@ * @name Defines for type widths */ /*@{*/ -#define SC_MISC_DMA_GRP_W 5 /*!< Width of sc_misc_dma_group_t */ +#define SC_MISC_DMA_GRP_W 5U /*!< Width of sc_misc_dma_group_t */ /*@}*/ /*! Max DMA channel priority group */ @@ -45,15 +45,6 @@ /*@}*/ /*! - * @name Defines for sc_misc_seco_auth_cmd_t - */ -/*@{*/ -#define SC_MISC_SECO_AUTH_SECO_FW 0U /*!< SECO Firmware */ -#define SC_MISC_SECO_AUTH_HDMI_TX_FW 1U /*!< HDMI TX Firmware */ -#define SC_MISC_SECO_AUTH_HDMI_RX_FW 2U /*!< HDMI RX Firmware */ -/*@}*/ - -/*! * @name Defines for sc_misc_temp_t */ /*@{*/ @@ -69,6 +60,20 @@ #define SC_MISC_AUTH_CONTAINER 0U /*!< Authenticate container */ #define SC_MISC_VERIFY_IMAGE 1U /*!< Verify image */ #define SC_MISC_REL_CONTAINER 2U /*!< Release container */ +#define SC_MISC_SECO_AUTH_SECO_FW 3U /*!< SECO Firmware */ +#define SC_MISC_SECO_AUTH_HDMI_TX_FW 4U /*!< HDMI TX Firmware */ +#define SC_MISC_SECO_AUTH_HDMI_RX_FW 5U /*!< HDMI RX Firmware */ +/*@}*/ + +/*! + * @name Defines for sc_misc_bt_t + */ +/*@{*/ +#define SC_MISC_BT_PRIMARY 0U +#define SC_MISC_BT_SECONDARY 1U +#define SC_MISC_BT_RECOVERY 2U +#define SC_MISC_BT_MANUFACTURE 3U +#define SC_MISC_BT_SERIAL 4U /*@}*/ /* Types */ @@ -93,6 +98,11 @@ typedef uint8_t sc_misc_seco_auth_cmd_t; */ typedef uint8_t sc_misc_temp_t; +/*! + * This type is used report the boot type. + */ +typedef uint8_t sc_misc_bt_t; + /* Functions */ /*! @@ -253,8 +263,7 @@ sc_err_t sc_misc_seco_authenticate(sc_ipc_t ipc, * Return errors codes: * - SC_ERR_UNAVAILABLE if SECO not available * - * Note \a addr must be a pointer into secure RAM. The contents at - * this location are a signed fuse command message block. + * Note \a addr must be a pointer to a signed message block. * * See the Security Reference Manual (SRM) for more info. */ @@ -271,8 +280,7 @@ sc_err_t sc_misc_seco_fuse_write(sc_ipc_t ipc, sc_faddr_t addr); * Return errors codes: * - SC_ERR_UNAVAILABLE if SECO not available * - * Note \a addr must be a pointer into secure RAM. The contents at - * this location are a signed fuse command message block. + * Note \a addr must be a pointer to a signed message block. * * See the Security Reference Manual (SRM) for more info. */ @@ -282,19 +290,28 @@ sc_err_t sc_misc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr); * This function updates the lifecycle of the device. * * @param[in] ipc IPC handle - * @param[in] lifecycle new lifecycle + * @param[in] change desired lifecycle transistion * * @return Returns and error code (SC_ERR_NONE = success). * * Return errors codes: * - SC_ERR_UNAVAILABLE if SECO not available * - * See the Security Reference Manual (SRM) for more info. + * This message is used for going from Open to NXP Closed to OEM Closed. + * Note \a change is NOT the new desired lifecycle. It is a lifecycle + * transition as documented in the Security Reference Manual (SRM). + * + * If any SECO request fails or only succeeds because the part is in an + * "OEM open" lifecycle, then a request to transition from "NXP closed" + * to "OEM closed" will also fail. For example, booting a signed container + * when the OEM SRK is not fused will succeed, but as it is an abnormal + * situation, a subsequent request to transition the lifecycle will return + * an error. */ -sc_err_t sc_misc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t lifecycle); +sc_err_t sc_misc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t change); /*! - * This function securely reverses the lifecycle. + * This function updates the lifecycle to one of the return lifecycles. * * @param[in] ipc IPC handle * @param[in] addr address of message block @@ -304,8 +321,11 @@ sc_err_t sc_misc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t lifecycle); * Return errors codes: * - SC_ERR_UNAVAILABLE if SECO not available * - * Note \a addr must be a pointer into secure RAM. The contents at - * this location are a signed fuse command message block. + * Note \a addr must be a pointer to a signed message block. + * + * To switch back to NXP states (Full Field Return), message must be signed + * by NXP SRK. For OEM States (Partial Field Return), must be signed by OEM + * SRK. * * See the Security Reference Manual (SRM) for more info. */ @@ -321,6 +341,145 @@ sc_err_t sc_misc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr); void sc_misc_seco_build_info(sc_ipc_t ipc, uint32_t *version, uint32_t *commit); +/*! + * This function is used to return SECO chip info. + * + * @param[in] ipc IPC handle + * @param[out] lc pointer to return lifecycle + * @param[out] monotonic pointer to return monotonic counter + * @param[out] uid_l pointer to return UID (lower 32 bits) + * @param[out] uid_h pointer to return UID (upper 32 bits) + */ +sc_err_t sc_misc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc, + uint16_t *monotonic, uint32_t *uid_l, uint32_t *uid_h); + +/*! + * This function is used to set the attestation mode. Only the owner of + * the SC_R_ATTESTATION resource may make this call. + * + * @param[in] ipc IPC handle + * @param[in] mode mode + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if \a mode is invalid + * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller + * - SC_ERR_UNAVAILABLE if SECO not available + * + * This is used to set the SECO attestation mode. This can be prover + * or verfier. See the Security Reference Manual (SRM) for more on the + * suported modes, mode values, and mode behavior. + */ +sc_err_t sc_misc_seco_attest_mode(sc_ipc_t ipc, uint32_t mode); + +/*! + * This function is used to request atestation. Only the owner of + * the SC_R_ATTESTATION resource may make this call. + * + * @param[in] ipc IPC handle + * @param[in] nonce unique value + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller + * - SC_ERR_UNAVAILABLE if SECO not available + * + * This is used to ask SECO to perform an attestation. The result depends + * on the attestation mode. After this call, the signature can be + * requested or a verify can be requested. + * + * See the Security Reference Manual (SRM) for more info. + */ +sc_err_t sc_misc_seco_attest(sc_ipc_t ipc, uint64_t nonce); + +/*! + * This function is used to retrieve the attestation public key. + * Mode must be verifier. Only the owner of the SC_R_ATTESTATION resource + * may make this call. + * + * @param[in] ipc IPC handle + * @param[in] addr address to write response + * + * Result will be written to \a addr. The \a addr parmater must point + * to an address SECO can access. It must be 64-bit aligned. There + * should be 96 bytes of space. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if \a addr bad or attestation has not been requested + * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller + * - SC_ERR_UNAVAILABLE if SECO not available + * + * See the Security Reference Manual (SRM) for more info. + */ +sc_err_t sc_misc_seco_get_attest_pkey(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function is used to retrieve attestation signature and parameters. + * Mode must be provider. Only the owner of the SC_R_ATTESTATION resource + * may make this call. + * + * @param[in] ipc IPC handle + * @param[in] addr address to write response + * + * Result will be written to \a addr. The \a addr parmater must point + * to an address SECO can access. It must be 64-bit aligned. There + * should be 120 bytes of space. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if \a addr bad or attestation has not been requested + * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller + * - SC_ERR_UNAVAILABLE if SECO not available + * + * See the Security Reference Manual (SRM) for more info. + */ +sc_err_t sc_misc_seco_get_attest_sign(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function is used to verify attestation. Mode must be verifier. + * Only the owner of the SC_R_ATTESTATION resource may make this call. + * + * @param[in] ipc IPC handle + * @param[in] addr address of signature + * + * The \a addr parmater must point to an address SECO can access. It must be + * 64-bit aligned. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if \a addr bad or attestation has not been requested + * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller + * - SC_ERR_UNAVAILABLE if SECO not available + * - SC_ERR_FAIL if signature doesn't match + * + * See the Security Reference Manual (SRM) for more info. + */ +sc_err_t sc_misc_seco_attest_verify(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function is used to commit into the fuses any new SRK revocation + * and FW version information that have been found in the primary and + * secondary containers. + * + * @param[in] ipc IPC handle + * @param[in,out] info pointer to information type to be committed + * + * The return \a info will contain what was actually committed. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if \a info is invalid + * - SC_ERR_UNAVAILABLE if SECO not available + */ +sc_err_t sc_misc_seco_commit(sc_ipc_t ipc, uint32_t *info); + /* @} */ /*! @@ -452,6 +611,11 @@ sc_err_t sc_misc_otp_fuse_read(sc_ipc_t ipc, uint32_t word, uint32_t *val); * @param[in] word fuse word index * @param[in] val fuse write value * + * The command is passed as is to SECO. SECO uses part of the + * \a word parameter to indicate if the fuse should be locked + * after programming. See the "Write common fuse" section of + * the Security Reference Manual (SRM) for more info. + * * @return Returns and error code (SC_ERR_NONE = success). * * Return errors codes: @@ -495,6 +659,7 @@ sc_err_t sc_misc_set_temp(sc_ipc_t ipc, sc_rsrc_t resource, * * Return errors codes: * - SC_ERR_PARM if parameters invalid + * - SC_ERR_BUSY if temp not ready yet (time delay after power on) */ sc_err_t sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp, int16_t *celsius, int8_t *tenths); @@ -508,6 +673,19 @@ sc_err_t sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *dev); /*! + * This function returns the boot type. + * + * @param[in] ipc IPC handle + * @param[out] type pointer to return boot type + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors code: + * - SC_ERR_UNAVAILABLE if type not passed by ROM + */ +sc_err_t sc_misc_get_boot_type(sc_ipc_t ipc, sc_misc_bt_t *type); + +/*! * This function returns the current status of the ON/OFF button. * * @param[in] ipc IPC handle @@ -515,6 +693,16 @@ void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *dev); */ void sc_misc_get_button_status(sc_ipc_t ipc, sc_bool_t *status); +/*! + * This function returns the ROM patch checksum. + * + * @param[in] ipc IPC handle + * @param[out] checksum pointer to return checksum + * + * @return Returns and error code (SC_ERR_NONE = success). + */ +sc_err_t sc_misc_rompatch_checksum(sc_ipc_t ipc, uint32_t *checksum); + /* @} */ #endif /* SC_MISC_API_H */ diff --git a/arch/arm/include/asm/mach-imx/sci/svc/pad/api.h b/arch/arm/include/asm/mach-imx/sci/svc/pad/api.h index cf29958091f..b7d536f0e62 100755..100644 --- a/arch/arm/include/asm/mach-imx/sci/svc/pad/api.h +++ b/arch/arm/include/asm/mach-imx/sci/svc/pad/api.h @@ -50,6 +50,9 @@ * * Note muxing two input pads to the same IP functional signal will * result in undefined behavior. + * + * @includedoc pad/details.dox + * * @{ */ @@ -67,7 +70,7 @@ * @name Defines for type widths */ /*@{*/ -#define SC_PAD_MUX_W 3 /*!< Width of mux parameter */ +#define SC_PAD_MUX_W 3U /*!< Width of mux parameter */ /*@}*/ /*! diff --git a/arch/arm/include/asm/mach-imx/sci/svc/pm/api.h b/arch/arm/include/asm/mach-imx/sci/svc/pm/api.h index 3d8cb57f503..a68915e3855 100755..100644 --- a/arch/arm/include/asm/mach-imx/sci/svc/pm/api.h +++ b/arch/arm/include/asm/mach-imx/sci/svc/pm/api.h @@ -14,6 +14,8 @@ * * Module for the Power Management (PM) service. * + * @includedoc pm/details.dox + * * @{ */ @@ -31,10 +33,10 @@ * @name Defines for type widths */ /*@{*/ -#define SC_PM_POWER_MODE_W 2 /*!< Width of sc_pm_power_mode_t */ -#define SC_PM_CLOCK_MODE_W 3 /*!< Width of sc_pm_clock_mode_t */ -#define SC_PM_RESET_TYPE_W 2 /*!< Width of sc_pm_reset_type_t */ -#define SC_PM_RESET_REASON_W 3 /*!< Width of sc_pm_reset_reason_t */ +#define SC_PM_POWER_MODE_W 2U /*!< Width of sc_pm_power_mode_t */ +#define SC_PM_CLOCK_MODE_W 3U /*!< Width of sc_pm_clock_mode_t */ +#define SC_PM_RESET_TYPE_W 2U /*!< Width of sc_pm_reset_type_t */ +#define SC_PM_RESET_REASON_W 4U /*!< Width of sc_pm_reset_reason_t */ /*@}*/ /*! @@ -47,7 +49,7 @@ * @name Defines for ALL parameters */ /*@{*/ -#define SC_PM_CLK_ALL UINT8_MAX /*!< All clocks */ +#define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */ /*@}*/ /*! @@ -112,28 +114,22 @@ /*@}*/ /*! - * @name Defines for sc_pm_reset_cause_t - */ -/*@{*/ -#define SC_PM_RESET_CAUSE_TEMP 0U /*!< Reset due to temp panic alarm */ -#define SC_PM_RESET_CAUSE_FAULT 1U /*!< Reset due to fault exception */ -#define SC_PM_RESET_CAUSE_IRQ 2U /*!< Reset due to SCU reset IRQ */ -#define SC_PM_RESET_CAUSE_WDOG 3U /*!< Reset due to SW WDOG */ -#define SC_PM_RESET_CAUSE_API 4U /*!< Reset due to pm_reset() or monitor */ -/*@}*/ - -/*! * @name Defines for sc_pm_reset_reason_t */ /*@{*/ #define SC_PM_RESET_REASON_POR 0U /*!< Power on reset */ -#define SC_PM_RESET_REASON_WARM 1U /*!< Warm reset */ +#define SC_PM_RESET_REASON_JTAG 1U /*!< JTAG reset */ #define SC_PM_RESET_REASON_SW 2U /*!< Software reset */ -#define SC_PM_RESET_REASON_WDOG 3U /*!< Watchdog reset */ -#define SC_PM_RESET_REASON_LOCKUP 4U /*!< Lockup reset */ -#define SC_PM_RESET_REASON_TAMPER 5U /*!< Tamper reset */ -#define SC_PM_RESET_REASON_TEMP 6U /*!< Temp reset */ -#define SC_PM_RESET_REASON_LOW_VOLT 7U /*!< Low voltage reset */ +#define SC_PM_RESET_REASON_WDOG 3U /*!< Partition watchdog reset */ +#define SC_PM_RESET_REASON_LOCKUP 4U /*!< SCU lockup reset */ +#define SC_PM_RESET_REASON_SNVS 5U /*!< SNVS reset */ +#define SC_PM_RESET_REASON_TEMP 6U /*!< Temp panic reset */ +#define SC_PM_RESET_REASON_MSI 7U /*!< MSI reset */ +#define SC_PM_RESET_REASON_UECC 8U /*!< ECC reset */ +#define SC_PM_RESET_REASON_SCFW_WDOG 9U /*!< SCFW watchdog reset */ +#define SC_PM_RESET_REASON_ROM_WDOG 10U /*!< SCU ROM watchdog reset */ +#define SC_PM_RESET_REASON_SECO 11U /*!< SECO reset */ +#define SC_PM_RESET_REASON_SCFW_FAULT 12U /*!< SCFW fault reset */ /*@}*/ /*! @@ -192,11 +188,6 @@ typedef uint32_t sc_pm_clock_rate_t; typedef uint8_t sc_pm_reset_type_t; /*! - * This type is used to declare a desired reset type. - */ -typedef uint8_t sc_pm_reset_cause; - -/*! * This type is used to declare a reason for a reset. */ typedef uint8_t sc_pm_reset_reason_t; @@ -286,6 +277,9 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, * - SC_ERR_NOACCESS if caller's partition is not the resource owner * or parent of the owner * + * Resources must be at SC_PM_PW_MODE_LP mode or higher to access them, + * otherwise the master will get a bus error or hang. + * * This function will record the individual resource power mode * and change it if the requested mode is lower than or equal to the * partition power mode set with sc_pm_set_partition_power_mode(). @@ -308,6 +302,32 @@ sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t mode); /*! +* This function sets the power mode for all the resources owned +* by a child partition. +* +* @param[in] ipc IPC handle +* @param[in] pt handle of child partition +* @param[in] mode power mode to apply +* @param[in] exclude resource to exclude +* +* @return Returns an error code (SC_ERR_NONE = success). +* +* Return errors: +* - SC_ERR_PARM if invalid partition or mode, +* - SC_ERR_NOACCESS if caller's partition is not the parent +* of \a pt +* +* This functions loops through all the resources owned by \a pt +* and sets the power mode to \a mode. It will skip setting +* \a exclude (SC_R_LAST to skip none). +* +* This function can only be called by the parent. It is used to +* implement some aspects of virtualization. +*/ +sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc, + sc_rm_pt_t pt, sc_pm_power_mode_t mode, sc_rsrc_t exclude); + +/*! * This function gets the power mode of a resource. * * @param[in] ipc IPC handle @@ -576,6 +596,13 @@ sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type); * @param[in] ipc IPC handle * @param[out] reason pointer to return reset reason * + * This function returns the reason a partition was reset. If the reason + * is POR, then the system reset reason will be returned. + * + * Note depending on the connection of the WDOG_OUT signal and the OTP + * programming of the PMIC, some resets may trigger a system POR + * and the original reason will be lost. + * * @return Returns an error code (SC_ERR_NONE = success). */ sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason); @@ -596,6 +623,10 @@ sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason); * - SC_ERR_PARM if invalid partition, resource, or addr, * - SC_ERR_NOACCESS if caller's partition is not the parent of the * partition to boot + * + * This must be used to boot a partition. Only a partition booted this + * way can be rebooted using the watchdog, sc_pm_boot() or + * sc_pm_reboot_partition(). */ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, @@ -671,10 +702,39 @@ sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt, * - SC_ERR_PARM if invalid resource or address, * - SC_ERR_NOACCESS if caller's partition is not the parent of the * resource (CPU) owner + * + * This function is usually used to start a secondar CPU in the + * same partition as the caller. It is not used to start the first + * CPU in a dedicated partition. That would be started by calling + * sc_pm_boot(). + * + * A CPU started with sc_pm_cpu_start() will not restart as a result + * of a watchdog event or calling sc_pm_reboot() or sc_pm_reboot_partition(). + * Those will reboot that partition which will start the CPU started with + * sc_pm_boot(). */ sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, sc_faddr_t address); +/*! + * This function is used to reset a CPU. + * + * @param[in] ipc IPC handle + * @param[in] resource ID of the CPU resource + * @param[in] address 64-bit boot address + * + * This function does not return anything as the calling core may have been + * reset. It can still fail if the resource or address is invalid. It can also + * fail if the caller's partition is not the owner of the CPU or not the + * parent of the CPU resource owner. Will also fail if the resource is not + * powered on. No indication of failure is returned. + * + * Note this just resets the CPU. None of the peripherals or bus fabric used by + * the CPU is reset. State configured in the SCFW is not reset. The SW running + * on the core has to understand and deal with this. + */ +void sc_pm_cpu_reset(sc_ipc_t ipc, sc_rsrc_t resource, sc_faddr_t address); + /* @} */ #endif /* SC_PM_API_H */ diff --git a/arch/arm/include/asm/mach-imx/sci/svc/rm/api.h b/arch/arm/include/asm/mach-imx/sci/svc/rm/api.h index f916c04e6f3..a27fa95525c 100755..100644 --- a/arch/arm/include/asm/mach-imx/sci/svc/rm/api.h +++ b/arch/arm/include/asm/mach-imx/sci/svc/rm/api.h @@ -32,12 +32,12 @@ * @name Defines for type widths */ /*@{*/ -#define SC_RM_PARTITION_W 5 /*!< Width of sc_rm_pt_t */ -#define SC_RM_MEMREG_W 6 /*!< Width of sc_rm_mr_t */ -#define SC_RM_DID_W 4 /*!< Width of sc_rm_did_t */ -#define SC_RM_SID_W 6 /*!< Width of sc_rm_sid_t */ -#define SC_RM_SPA_W 2 /*!< Width of sc_rm_spa_t */ -#define SC_RM_PERM_W 3 /*!< Width of sc_rm_perm_t */ +#define SC_RM_PARTITION_W 5U /*!< Width of sc_rm_pt_t */ +#define SC_RM_MEMREG_W 6U /*!< Width of sc_rm_mr_t */ +#define SC_RM_DID_W 4U /*!< Width of sc_rm_did_t */ +#define SC_RM_SID_W 6U /*!< Width of sc_rm_sid_t */ +#define SC_RM_SPA_W 2U /*!< Width of sc_rm_spa_t */ +#define SC_RM_PERM_W 3U /*!< Width of sc_rm_perm_t */ /*@}*/ /*! @@ -564,6 +564,32 @@ sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr, sc_rm_mr_t *mr_ret, sc_faddr_t addr_start, sc_faddr_t addr_end); /*! + * This function requests that the SC fragment a memory region. + * + * @param[in] ipc IPC handle + * @param[out] mr_ret return handle for new region; used for + * subsequent function calls + * associated with this region + * @param[in] addr_start start address of region (physical) + * @param[in] addr_end end address of region (physical) + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_LOCKED if caller's partition is locked, + * - SC_ERR_PARM if the new memory region spans multiple existing regions, + * - SC_ERR_NOACCESS if caller's partition does not own the memory containing + * the new region, + * - SC_ERR_UNAVAILABLE if memory region table is full (no more allocation + * space) + * + * This function finds the memory region containing the address range. + * It then splits it as required and returns the extracted region. + */ +sc_err_t sc_rm_memreg_frag(sc_ipc_t ipc, sc_rm_mr_t *mr_ret, + sc_faddr_t addr_start, sc_faddr_t addr_end); + +/*! * This function frees a memory region. * * @param[in] ipc IPC handle diff --git a/arch/arm/include/asm/mach-imx/sci/svc/timer/api.h b/arch/arm/include/asm/mach-imx/sci/svc/timer/api.h index 2af17dd120d..a96f5b9cd62 100755..100644 --- a/arch/arm/include/asm/mach-imx/sci/svc/timer/api.h +++ b/arch/arm/include/asm/mach-imx/sci/svc/timer/api.h @@ -32,7 +32,7 @@ * @name Defines for type widths */ /*@{*/ -#define SC_TIMER_ACTION_W 3 /*!< Width of sc_timer_wdog_action_t */ +#define SC_TIMER_ACTION_W 3U /*!< Width of sc_timer_wdog_action_t */ /*@}*/ /*! @@ -257,7 +257,7 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon, uint8_t day, uint8_t hour, uint8_t min, uint8_t sec); /*! - * This function sets the RTC alarm. + * This function sets the RTC alarm (periodic mode). * * @param[in] ipc IPC handle * @param[in] sec period in seconds @@ -270,7 +270,7 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon, sc_err_t sc_timer_set_rtc_periodic_alarm(sc_ipc_t ipc, uint32_t sec); /*! - * This function sets the RTC alarm. + * This function cancels the RTC alarm. * * @param[in] ipc IPC handle * @@ -300,6 +300,56 @@ sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count); /* @} */ +/*! + * @name System Counter (SYSCTR) Functions + * @{ + */ + +/*! + * This function sets the SYSCTR alarm. + * + * @param[in] ipc IPC handle + * @param[in] ticks number of 8MHz cycles + * + * Note this alarm setting clears when the alarm is triggered. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid time/date parameters + */ +sc_err_t sc_timer_set_sysctr_alarm(sc_ipc_t ipc, uint64_t ticks); + +/*! + * This function sets the SYSCTR alarm (periodic mode). + * + * @param[in] ipc IPC handle + * @param[in] ticks number of 8MHz cycles + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid time/date parameters + */ +sc_err_t sc_timer_set_sysctr_periodic_alarm(sc_ipc_t ipc, + uint64_t ticks); + +/*! + * This function cancels the SYSCTR alarm. + * + * @param[in] ipc IPC handle + * + * Note this alarm setting clears when the alarm is triggered. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid time/date parameters + */ +sc_err_t sc_timer_cancel_sysctr_alarm(sc_ipc_t ipc); + +/* @} */ + #endif /* SC_TIMER_API_H */ /**@}*/ diff --git a/arch/arm/include/asm/mach-imx/sci/types.h b/arch/arm/include/asm/mach-imx/sci/types.h index a25f4fa860d..c9e91fa9dfe 100755..100644 --- a/arch/arm/include/asm/mach-imx/sci/types.h +++ b/arch/arm/include/asm/mach-imx/sci/types.h @@ -61,21 +61,33 @@ #define SC_594MHZ 594000000U /*!< 594MHz */ #define SC_625MHZ 625000000U /*!< 625MHz */ #define SC_640MHZ 640000000U /*!< 640MHz */ +#define SC_648MHZ 648000000U /*!< 648MHz */ #define SC_650MHZ 650000000U /*!< 650MHz */ #define SC_667MHZ 666666667U /*!< 667MHz */ #define SC_675MHZ 675000000U /*!< 675MHz */ #define SC_700MHZ 700000000U /*!< 700MHz */ #define SC_720MHZ 720000000U /*!< 720MHz */ #define SC_750MHZ 750000000U /*!< 750MHz */ +#define SC_753MHZ 753000000U /*!< 753MHz */ +#define SC_793MHZ 793000000U /*!< 793MHz */ #define SC_800MHZ 800000000U /*!< 800MHz */ #define SC_850MHZ 850000000U /*!< 850MHz */ +#define SC_858MHZ 858000000U /*!< 858MHz */ #define SC_900MHZ 900000000U /*!< 900MHz */ +#define SC_953MHZ 953000000U /*!< 953MHz */ +#define SC_963MHZ 963000000U /*!< 963MHz */ #define SC_1000MHZ 1000000000U /*!< 1GHz */ -#define SC_1056MHZ 1056000000U /*!< 1.056GHz */ +#define SC_1060MHZ 1060000000U /*!< 1.06GHz */ +#define SC_1068MHZ 1068000000U /*!< 1.068GHz */ +#define SC_1121MHZ 1121000000U /*!< 1.121GHz */ +#define SC_1173MHZ 1173000000U /*!< 1.173GHz */ #define SC_1188MHZ 1188000000U /*!< 1.188GHz */ #define SC_1260MHZ 1260000000U /*!< 1.26GHz */ +#define SC_1278MHZ 1278000000U /*!< 1.278GHz */ #define SC_1280MHZ 1280000000U /*!< 1.28GHz */ #define SC_1300MHZ 1300000000U /*!< 1.3GHz */ +#define SC_1313MHZ 1313000000U /*!< 1.313GHz */ +#define SC_1345MHZ 1345000000U /*!< 1.345GHz */ #define SC_1400MHZ 1400000000U /*!< 1.4GHz */ #define SC_1500MHZ 1500000000U /*!< 1.5GHz */ #define SC_1600MHZ 1600000000U /*!< 1.6GHz */ @@ -112,6 +124,7 @@ #define SC_864MHZ 864000000U /*!< 864MHz */ #define SC_960MHZ 960000000U /*!< 960MHz */ #define SC_1056MHZ 1056000000U /*!< 1056MHz */ +#define SC_1104MHZ 1104000000U /*!< 1104MHz */ #define SC_1200MHZ 1200000000U /*!< 1.2GHz */ #define SC_1464MHZ 1464000000U /*!< 1.464GHz */ #define SC_2400MHZ 2400000000U /*!< 2.4GHz */ @@ -129,7 +142,6 @@ * @name Defines for type widths */ /*@{*/ -#define SC_FADDR_W 36U /*!< Width of sc_faddr_t */ #define SC_BOOL_W 1U /*!< Width of sc_bool_t */ #define SC_ERR_W 4U /*!< Width of sc_err_t */ #define SC_RSRC_W 10U /*!< Width of sc_rsrc_t */ @@ -140,8 +152,8 @@ * @name Defines for sc_bool_t */ /*@{*/ -#define SC_FALSE ((sc_bool_t) 0U) /*!< True */ -#define SC_TRUE ((sc_bool_t) 1U) /*!< False */ +#define SC_FALSE ((sc_bool_t) 0U) /*!< False */ +#define SC_TRUE ((sc_bool_t) 1U) /*!< True */ /*@}*/ /*! @@ -490,7 +502,7 @@ #define SC_R_SAI_2 320U #define SC_R_IRQSTR_SCU2 321U #define SC_R_IRQSTR_DSP 322U -#define SC_R_UNUSED5 323U +#define SC_R_ELCDIF_PLL 323U #define SC_R_OCRAM 324U #define SC_R_AUDIO_PLL_0 325U #define SC_R_PI_0 326U @@ -708,7 +720,13 @@ #define SC_R_VPU_MU_3 538U #define SC_R_VPU_ENC_1 539U #define SC_R_VPU 540U -#define SC_R_LAST 541U +#define SC_R_DMA_5_CH0 541U +#define SC_R_DMA_5_CH1 542U +#define SC_R_DMA_5_CH2 543U +#define SC_R_DMA_5_CH3 544U +#define SC_R_ATTESTATION 545U +#define SC_R_PERF 546U +#define SC_R_LAST 547U #define SC_R_ALL ((sc_rsrc_t) UINT16_MAX) /*!< All resources */ /*@}*/ @@ -763,7 +781,17 @@ #define SC_C_RST0 43U #define SC_C_RST1 44U #define SC_C_SEL0 45U -#define SC_C_LAST 46U +#define SC_C_CALIB0 46U +#define SC_C_CALIB1 47U +#define SC_C_CALIB2 48U +#define SC_C_IPG_DEBUG 49U +#define SC_C_IPG_DOZE 50U +#define SC_C_IPG_WAIT 51U +#define SC_C_IPG_STOP 52U +#define SC_C_IPG_STOP_MODE 53U +#define SC_C_IPG_STOP_ACK 54U +#define SC_C_SYNC_CTRL 55U +#define SC_C_LAST 56U #define SC_P_ALL ((sc_pad_t) UINT16_MAX) /*!< All pads */ @@ -794,7 +822,7 @@ typedef uint16_t sc_rsrc_t; /*! * This type is used to indicate a control. */ -typedef uint8_t sc_ctrl_t; +typedef uint32_t sc_ctrl_t; /*! * This type is used to indicate a pad. Valid values are SoC specific. diff --git a/arch/arm/mach-imx/sci/ipc.c b/arch/arm/mach-imx/sci/ipc.c index 10fbdb51715..a7a97774717 100644 --- a/arch/arm/mach-imx/sci/ipc.c +++ b/arch/arm/mach-imx/sci/ipc.c @@ -114,7 +114,7 @@ void sc_ipc_read(sc_ipc_t ipc, void *data) /*--------------------------------------------------------------------------*/ /* Write a message to an IPC channel */ /*--------------------------------------------------------------------------*/ -void sc_ipc_write(sc_ipc_t ipc, void *data) +void sc_ipc_write(sc_ipc_t ipc, const void *data) { MU_Type *base = (MU_Type*) ipc; sc_rpc_msg_t *msg = (sc_rpc_msg_t*) data; diff --git a/arch/arm/mach-imx/sci/svc/irq/rpc.h b/arch/arm/mach-imx/sci/svc/irq/rpc.h index ca0653d4dae..04bc22dfdd9 100644 --- a/arch/arm/mach-imx/sci/svc/irq/rpc.h +++ b/arch/arm/mach-imx/sci/svc/irq/rpc.h @@ -40,14 +40,6 @@ */ void irq_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); -/*! - * This function translates and dispatches an IRQ RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void irq_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); - #endif /* SC_IRQ_RPC_H */ /**@}*/ diff --git a/arch/arm/mach-imx/sci/svc/irq/rpc_clnt.c b/arch/arm/mach-imx/sci/svc/irq/rpc_clnt.c index 362b096daea..c0cfe16164d 100644 --- a/arch/arm/mach-imx/sci/svc/irq/rpc_clnt.c +++ b/arch/arm/mach-imx/sci/svc/irq/rpc_clnt.c @@ -34,12 +34,12 @@ sc_err_t sc_irq_enable(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_IRQ; - RPC_FUNC(&msg) = (uint8_t) IRQ_FUNC_ENABLE; - RPC_U32(&msg, 0U) = (uint32_t) mask; - RPC_U16(&msg, 4U) = (uint16_t) resource; - RPC_U8(&msg, 6U) = (uint8_t) group; - RPC_U8(&msg, 7U) = (uint8_t) enable; + RPC_SVC(&msg) = U8(SC_RPC_SVC_IRQ); + RPC_FUNC(&msg) = U8(IRQ_FUNC_ENABLE); + RPC_U32(&msg, 0U) = U32(mask); + RPC_U16(&msg, 4U) = U16(resource); + RPC_U8(&msg, 6U) = U8(group); + RPC_U8(&msg, 7U) = B2U8(enable); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -55,10 +55,10 @@ sc_err_t sc_irq_status(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_IRQ; - RPC_FUNC(&msg) = (uint8_t) IRQ_FUNC_STATUS; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) group; + RPC_SVC(&msg) = U8(SC_RPC_SVC_IRQ); + RPC_FUNC(&msg) = U8(IRQ_FUNC_STATUS); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(group); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); diff --git a/arch/arm/mach-imx/sci/svc/misc/rpc.h b/arch/arm/mach-imx/sci/svc/misc/rpc.h index fee681d8891..614f06bd71f 100644 --- a/arch/arm/mach-imx/sci/svc/misc/rpc.h +++ b/arch/arm/mach-imx/sci/svc/misc/rpc.h @@ -35,6 +35,13 @@ #define MISC_FUNC_SECO_FORWARD_LIFECYCLE 22U /*!< Index for misc_seco_forward_lifecycle() RPC call */ #define MISC_FUNC_SECO_RETURN_LIFECYCLE 23U /*!< Index for misc_seco_return_lifecycle() RPC call */ #define MISC_FUNC_SECO_BUILD_INFO 24U /*!< Index for misc_seco_build_info() RPC call */ +#define MISC_FUNC_SECO_CHIP_INFO 25U /*!< Index for misc_seco_chip_info() RPC call */ +#define MISC_FUNC_SECO_ATTEST_MODE 27U /*!< Index for misc_seco_attest_mode() RPC call */ +#define MISC_FUNC_SECO_ATTEST 28U /*!< Index for misc_seco_attest() RPC call */ +#define MISC_FUNC_SECO_GET_ATTEST_PKEY 31U /*!< Index for misc_seco_get_attest_pkey() RPC call */ +#define MISC_FUNC_SECO_GET_ATTEST_SIGN 29U /*!< Index for misc_seco_get_attest_sign() RPC call */ +#define MISC_FUNC_SECO_ATTEST_VERIFY 30U /*!< Index for misc_seco_attest_verify() RPC call */ +#define MISC_FUNC_SECO_COMMIT 32U /*!< Index for misc_seco_commit() RPC call */ #define MISC_FUNC_DEBUG_OUT 10U /*!< Index for misc_debug_out() RPC call */ #define MISC_FUNC_WAVEFORM_CAPTURE 6U /*!< Index for misc_waveform_capture() RPC call */ #define MISC_FUNC_BUILD_INFO 15U /*!< Index for misc_build_info() RPC call */ @@ -47,7 +54,9 @@ #define MISC_FUNC_SET_TEMP 12U /*!< Index for misc_set_temp() RPC call */ #define MISC_FUNC_GET_TEMP 13U /*!< Index for misc_get_temp() RPC call */ #define MISC_FUNC_GET_BOOT_DEV 16U /*!< Index for misc_get_boot_dev() RPC call */ +#define MISC_FUNC_GET_BOOT_TYPE 33U /*!< Index for misc_get_boot_type() RPC call */ #define MISC_FUNC_GET_BUTTON_STATUS 18U /*!< Index for misc_get_button_status() RPC call */ +#define MISC_FUNC_ROMPATCH_CHECKSUM 26U /*!< Index for misc_rompatch_checksum() RPC call */ /*@}*/ /* Types */ @@ -62,14 +71,6 @@ */ void misc_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); -/*! - * This function translates and dispatches an MISC RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void misc_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); - #endif /* SC_MISC_RPC_H */ /**@}*/ diff --git a/arch/arm/mach-imx/sci/svc/misc/rpc_clnt.c b/arch/arm/mach-imx/sci/svc/misc/rpc_clnt.c index 9d0d83f6862..d6d0744d751 100644 --- a/arch/arm/mach-imx/sci/svc/misc/rpc_clnt.c +++ b/arch/arm/mach-imx/sci/svc/misc/rpc_clnt.c @@ -34,11 +34,11 @@ sc_err_t sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SET_CONTROL; - RPC_U32(&msg, 0U) = (uint32_t) ctrl; - RPC_U32(&msg, 4U) = (uint32_t) val; - RPC_U16(&msg, 8U) = (uint16_t) resource; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SET_CONTROL); + RPC_U32(&msg, 0U) = U32(ctrl); + RPC_U32(&msg, 4U) = U32(val); + RPC_U16(&msg, 8U) = U16(resource); RPC_SIZE(&msg) = 4U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -54,10 +54,10 @@ sc_err_t sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_GET_CONTROL; - RPC_U32(&msg, 0U) = (uint32_t) ctrl; - RPC_U16(&msg, 4U) = (uint16_t) resource; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_CONTROL); + RPC_U32(&msg, 0U) = U32(ctrl); + RPC_U16(&msg, 4U) = U16(resource); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -78,10 +78,10 @@ sc_err_t sc_misc_set_max_dma_group(sc_ipc_t ipc, sc_rm_pt_t pt, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SET_MAX_DMA_GROUP; - RPC_U8(&msg, 0U) = (uint8_t) pt; - RPC_U8(&msg, 1U) = (uint8_t) max; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SET_MAX_DMA_GROUP); + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(max); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -97,10 +97,10 @@ sc_err_t sc_misc_set_dma_group(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SET_DMA_GROUP; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) group; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SET_DMA_GROUP); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(group); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -116,14 +116,14 @@ sc_err_t sc_misc_seco_image_load(sc_ipc_t ipc, sc_faddr_t addr_src, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SECO_IMAGE_LOAD; - RPC_U32(&msg, 0U) = (uint32_t) (addr_src >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) addr_src; - RPC_U32(&msg, 8U) = (uint32_t) (addr_dst >> 32U); - RPC_U32(&msg, 12U) = (uint32_t) addr_dst; - RPC_U32(&msg, 16U) = (uint32_t) len; - RPC_U8(&msg, 20U) = (uint8_t) fw; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_IMAGE_LOAD); + RPC_U32(&msg, 0U) = U32(addr_src >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr_src); + RPC_U32(&msg, 8U) = U32(addr_dst >> 32ULL); + RPC_U32(&msg, 12U) = U32(addr_dst); + RPC_U32(&msg, 16U) = U32(len); + RPC_U8(&msg, 20U) = B2U8(fw); RPC_SIZE(&msg) = 7U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -139,11 +139,11 @@ sc_err_t sc_misc_seco_authenticate(sc_ipc_t ipc, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SECO_AUTHENTICATE; - RPC_U32(&msg, 0U) = (uint32_t) (addr >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) addr; - RPC_U8(&msg, 8U) = (uint8_t) cmd; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_AUTHENTICATE); + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + RPC_U8(&msg, 8U) = U8(cmd); RPC_SIZE(&msg) = 4U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -158,10 +158,10 @@ sc_err_t sc_misc_seco_fuse_write(sc_ipc_t ipc, sc_faddr_t addr) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SECO_FUSE_WRITE; - RPC_U32(&msg, 0U) = (uint32_t) (addr >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) addr; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_FUSE_WRITE); + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -176,10 +176,10 @@ sc_err_t sc_misc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SECO_ENABLE_DEBUG; - RPC_U32(&msg, 0U) = (uint32_t) (addr >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) addr; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_ENABLE_DEBUG); + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -188,15 +188,15 @@ sc_err_t sc_misc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr) return (sc_err_t) result; } -sc_err_t sc_misc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t lifecycle) +sc_err_t sc_misc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t change) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SECO_FORWARD_LIFECYCLE; - RPC_U32(&msg, 0U) = (uint32_t) lifecycle; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_FORWARD_LIFECYCLE); + RPC_U32(&msg, 0U) = U32(change); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -211,10 +211,10 @@ sc_err_t sc_misc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SECO_RETURN_LIFECYCLE; - RPC_U32(&msg, 0U) = (uint32_t) (addr >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) addr; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_RETURN_LIFECYCLE); + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -229,8 +229,8 @@ void sc_misc_seco_build_info(sc_ipc_t ipc, uint32_t *version, sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SECO_BUILD_INFO; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_BUILD_INFO); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -248,14 +248,158 @@ void sc_misc_seco_build_info(sc_ipc_t ipc, uint32_t *version, return; } +sc_err_t sc_misc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc, + uint16_t *monotonic, uint32_t *uid_l, uint32_t *uid_h) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_CHIP_INFO); + RPC_SIZE(&msg) = 1U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + if (uid_l != NULL) + { + *uid_l = RPC_U32(&msg, 0U); + } + + if (uid_h != NULL) + { + *uid_h = RPC_U32(&msg, 4U); + } + + if (lc != NULL) + { + *lc = RPC_U16(&msg, 8U); + } + + if (monotonic != NULL) + { + *monotonic = RPC_U16(&msg, 10U); + } + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_misc_seco_attest_mode(sc_ipc_t ipc, uint32_t mode) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_ATTEST_MODE); + RPC_U32(&msg, 0U) = U32(mode); + RPC_SIZE(&msg) = 2U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_misc_seco_attest(sc_ipc_t ipc, uint64_t nonce) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_ATTEST); + RPC_U32(&msg, 0U) = U32(nonce >> 32ULL); + RPC_U32(&msg, 4U) = U32(nonce); + RPC_SIZE(&msg) = 3U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_misc_seco_get_attest_pkey(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_GET_ATTEST_PKEY); + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + RPC_SIZE(&msg) = 3U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_misc_seco_get_attest_sign(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_GET_ATTEST_SIGN); + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + RPC_SIZE(&msg) = 3U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_misc_seco_attest_verify(sc_ipc_t ipc, sc_faddr_t addr) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_ATTEST_VERIFY); + RPC_U32(&msg, 0U) = U32(addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr); + RPC_SIZE(&msg) = 3U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_misc_seco_commit(sc_ipc_t ipc, uint32_t *info) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SECO_COMMIT); + RPC_U32(&msg, 0U) = *PTR_U32(info); + RPC_SIZE(&msg) = 2U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + *info = RPC_U32(&msg, 0U); + result = RPC_R8(&msg); + return (sc_err_t) result; +} + void sc_misc_debug_out(sc_ipc_t ipc, uint8_t ch) { sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_DEBUG_OUT; - RPC_U8(&msg, 0U) = (uint8_t) ch; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_DEBUG_OUT); + RPC_U8(&msg, 0U) = U8(ch); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -269,9 +413,9 @@ sc_err_t sc_misc_waveform_capture(sc_ipc_t ipc, sc_bool_t enable) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_WAVEFORM_CAPTURE; - RPC_U8(&msg, 0U) = (uint8_t) enable; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_WAVEFORM_CAPTURE); + RPC_U8(&msg, 0U) = B2U8(enable); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -286,8 +430,8 @@ void sc_misc_build_info(sc_ipc_t ipc, uint32_t *build, sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_BUILD_INFO; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_BUILD_INFO); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -311,8 +455,8 @@ void sc_misc_unique_id(sc_ipc_t ipc, uint32_t *id_l, sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_UNIQUE_ID; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_UNIQUE_ID); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -337,12 +481,12 @@ sc_err_t sc_misc_set_ari(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SET_ARI; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U16(&msg, 2U) = (uint16_t) resource_mst; - RPC_U16(&msg, 4U) = (uint16_t) ari; - RPC_U8(&msg, 6U) = (uint8_t) enable; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SET_ARI); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U16(&msg, 2U) = U16(resource_mst); + RPC_U16(&msg, 4U) = U16(ari); + RPC_U8(&msg, 6U) = B2U8(enable); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -356,9 +500,9 @@ void sc_misc_boot_status(sc_ipc_t ipc, sc_misc_boot_status_t status) sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_BOOT_STATUS; - RPC_U8(&msg, 0U) = (uint8_t) status; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_BOOT_STATUS); + RPC_U8(&msg, 0U) = U8(status); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_TRUE); @@ -372,9 +516,9 @@ sc_err_t sc_misc_boot_done(sc_ipc_t ipc, sc_rsrc_t cpu) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_BOOT_DONE; - RPC_U16(&msg, 0U) = (uint16_t) cpu; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_BOOT_DONE); + RPC_U16(&msg, 0U) = U16(cpu); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -389,9 +533,9 @@ sc_err_t sc_misc_otp_fuse_read(sc_ipc_t ipc, uint32_t word, uint32_t *val) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_OTP_FUSE_READ; - RPC_U32(&msg, 0U) = (uint32_t) word; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_OTP_FUSE_READ); + RPC_U32(&msg, 0U) = U32(word); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -411,10 +555,10 @@ sc_err_t sc_misc_otp_fuse_write(sc_ipc_t ipc, uint32_t word, uint32_t val) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_OTP_FUSE_WRITE; - RPC_U32(&msg, 0U) = (uint32_t) word; - RPC_U32(&msg, 4U) = (uint32_t) val; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_OTP_FUSE_WRITE); + RPC_U32(&msg, 0U) = U32(word); + RPC_U32(&msg, 4U) = U32(val); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -430,12 +574,12 @@ sc_err_t sc_misc_set_temp(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SET_TEMP; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_I16(&msg, 2U) = (uint16_t) celsius; - RPC_U8(&msg, 4U) = (uint8_t) temp; - RPC_I8(&msg, 5U) = (int8_t) tenths; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_SET_TEMP); + RPC_U16(&msg, 0U) = U16(resource); + RPC_I16(&msg, 2U) = I16(celsius); + RPC_U8(&msg, 4U) = U8(temp); + RPC_I8(&msg, 5U) = I8(tenths); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -451,10 +595,10 @@ sc_err_t sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_GET_TEMP; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) temp; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_TEMP); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(temp); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -478,8 +622,8 @@ void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *dev) sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_GET_BOOT_DEV; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_BOOT_DEV); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -492,24 +636,66 @@ void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *dev) return; } +sc_err_t sc_misc_get_boot_type(sc_ipc_t ipc, sc_misc_bt_t *type) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_BOOT_TYPE); + RPC_SIZE(&msg) = 1U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + if (type != NULL) + { + *type = RPC_U8(&msg, 0U); + } + + return (sc_err_t) result; +} + void sc_misc_get_button_status(sc_ipc_t ipc, sc_bool_t *status) { sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; - RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_GET_BUTTON_STATUS; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_GET_BUTTON_STATUS); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); if (status != NULL) { - *status = RPC_U8(&msg, 0U); + *status = U2B(RPC_U8(&msg, 0U)); } return; } +sc_err_t sc_misc_rompatch_checksum(sc_ipc_t ipc, uint32_t *checksum) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = U8(MISC_FUNC_ROMPATCH_CHECKSUM); + RPC_SIZE(&msg) = 1U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + if (checksum != NULL) + { + *checksum = RPC_U32(&msg, 0U); + } + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + /**@}*/ diff --git a/arch/arm/mach-imx/sci/svc/pad/rpc.h b/arch/arm/mach-imx/sci/svc/pad/rpc.h index b658dcc23df..35983334f1f 100644 --- a/arch/arm/mach-imx/sci/svc/pad/rpc.h +++ b/arch/arm/mach-imx/sci/svc/pad/rpc.h @@ -54,14 +54,6 @@ */ void pad_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); -/*! - * This function translates and dispatches an PAD RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void pad_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); - #endif /* SC_PAD_RPC_H */ /**@}*/ diff --git a/arch/arm/mach-imx/sci/svc/pad/rpc_clnt.c b/arch/arm/mach-imx/sci/svc/pad/rpc_clnt.c index 03f4f780881..8e67c95e2cb 100644 --- a/arch/arm/mach-imx/sci/svc/pad/rpc_clnt.c +++ b/arch/arm/mach-imx/sci/svc/pad/rpc_clnt.c @@ -34,12 +34,12 @@ sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pad_t pad, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_SET_MUX; - RPC_U16(&msg, 0U) = (uint16_t) pad; - RPC_U8(&msg, 2U) = (uint8_t) mux; - RPC_U8(&msg, 3U) = (uint8_t) config; - RPC_U8(&msg, 4U) = (uint8_t) iso; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_MUX); + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(mux); + RPC_U8(&msg, 3U) = U8(config); + RPC_U8(&msg, 4U) = U8(iso); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -55,9 +55,9 @@ sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pad_t pad, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_GET_MUX; - RPC_U16(&msg, 0U) = (uint16_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_MUX); + RPC_U16(&msg, 0U) = U16(pad); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -87,10 +87,10 @@ sc_err_t sc_pad_set_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t ctrl) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_SET_GP; - RPC_U32(&msg, 0U) = (uint32_t) ctrl; - RPC_U16(&msg, 4U) = (uint16_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_GP); + RPC_U32(&msg, 0U) = U32(ctrl); + RPC_U16(&msg, 4U) = U16(pad); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -105,9 +105,9 @@ sc_err_t sc_pad_get_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t *ctrl) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_GET_GP; - RPC_U16(&msg, 0U) = (uint16_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_GP); + RPC_U16(&msg, 0U) = U16(pad); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -128,10 +128,10 @@ sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_SET_WAKEUP; - RPC_U16(&msg, 0U) = (uint16_t) pad; - RPC_U8(&msg, 2U) = (uint8_t) wakeup; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_WAKEUP); + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(wakeup); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -147,9 +147,9 @@ sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_GET_WAKEUP; - RPC_U16(&msg, 0U) = (uint16_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_WAKEUP); + RPC_U16(&msg, 0U) = U16(pad); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -171,14 +171,14 @@ sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_SET_ALL; - RPC_U32(&msg, 0U) = (uint32_t) ctrl; - RPC_U16(&msg, 4U) = (uint16_t) pad; - RPC_U8(&msg, 6U) = (uint8_t) mux; - RPC_U8(&msg, 7U) = (uint8_t) config; - RPC_U8(&msg, 8U) = (uint8_t) iso; - RPC_U8(&msg, 9U) = (uint8_t) wakeup; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_ALL); + RPC_U32(&msg, 0U) = U32(ctrl); + RPC_U16(&msg, 4U) = U16(pad); + RPC_U8(&msg, 6U) = U8(mux); + RPC_U8(&msg, 7U) = U8(config); + RPC_U8(&msg, 8U) = U8(iso); + RPC_U8(&msg, 9U) = U8(wakeup); RPC_SIZE(&msg) = 4U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -195,9 +195,9 @@ sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_GET_ALL; - RPC_U16(&msg, 0U) = (uint16_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_ALL); + RPC_U16(&msg, 0U) = U16(pad); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -237,10 +237,10 @@ sc_err_t sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, uint32_t val) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_SET; - RPC_U32(&msg, 0U) = (uint32_t) val; - RPC_U16(&msg, 4U) = (uint16_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET); + RPC_U32(&msg, 0U) = U32(val); + RPC_U16(&msg, 4U) = U16(pad); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -255,9 +255,9 @@ sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_GET; - RPC_U16(&msg, 0U) = (uint16_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET); + RPC_U16(&msg, 0U) = U16(pad); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -278,11 +278,11 @@ sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_SET_GP_28FDSOI; - RPC_U16(&msg, 0U) = (uint16_t) pad; - RPC_U8(&msg, 2U) = (uint8_t) dse; - RPC_U8(&msg, 3U) = (uint8_t) ps; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_GP_28FDSOI); + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(dse); + RPC_U8(&msg, 3U) = U8(ps); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -298,9 +298,9 @@ sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_GET_GP_28FDSOI; - RPC_U16(&msg, 0U) = (uint16_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_GP_28FDSOI); + RPC_U16(&msg, 0U) = U16(pad); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -327,14 +327,14 @@ sc_err_t sc_pad_set_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_SET_GP_28FDSOI_HSIC; - RPC_U16(&msg, 0U) = (uint16_t) pad; - RPC_U8(&msg, 2U) = (uint8_t) dse; - RPC_U8(&msg, 3U) = (uint8_t) pus; - RPC_U8(&msg, 4U) = (uint8_t) hys; - RPC_U8(&msg, 5U) = (uint8_t) pke; - RPC_U8(&msg, 6U) = (uint8_t) pue; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_GP_28FDSOI_HSIC); + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(dse); + RPC_U8(&msg, 3U) = U8(pus); + RPC_U8(&msg, 4U) = B2U8(hys); + RPC_U8(&msg, 5U) = B2U8(pke); + RPC_U8(&msg, 6U) = B2U8(pue); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -351,9 +351,9 @@ sc_err_t sc_pad_get_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_GET_GP_28FDSOI_HSIC; - RPC_U16(&msg, 0U) = (uint16_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_GP_28FDSOI_HSIC); + RPC_U16(&msg, 0U) = U16(pad); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -371,17 +371,17 @@ sc_err_t sc_pad_get_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad, if (hys != NULL) { - *hys = RPC_U8(&msg, 2U); + *hys = U2B(RPC_U8(&msg, 2U)); } if (pke != NULL) { - *pke = RPC_U8(&msg, 3U); + *pke = U2B(RPC_U8(&msg, 3U)); } if (pue != NULL) { - *pue = RPC_U8(&msg, 4U); + *pue = U2B(RPC_U8(&msg, 4U)); } return (sc_err_t) result; @@ -395,15 +395,15 @@ sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_SET_GP_28FDSOI_COMP; - RPC_U16(&msg, 0U) = (uint16_t) pad; - RPC_U8(&msg, 2U) = (uint8_t) compen; - RPC_U8(&msg, 3U) = (uint8_t) rasrcp; - RPC_U8(&msg, 4U) = (uint8_t) rasrcn; - RPC_U8(&msg, 5U) = (uint8_t) fastfrz; - RPC_U8(&msg, 6U) = (uint8_t) nasrc_sel; - RPC_U8(&msg, 7U) = (uint8_t) psw_ovr; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_SET_GP_28FDSOI_COMP); + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(compen); + RPC_U8(&msg, 3U) = U8(rasrcp); + RPC_U8(&msg, 4U) = U8(rasrcn); + RPC_U8(&msg, 5U) = B2U8(fastfrz); + RPC_U8(&msg, 6U) = B2U8(nasrc_sel); + RPC_U8(&msg, 7U) = B2U8(psw_ovr); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -420,9 +420,9 @@ sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PAD; - RPC_FUNC(&msg) = (uint8_t) PAD_FUNC_GET_GP_28FDSOI_COMP; - RPC_U16(&msg, 0U) = (uint16_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PAD); + RPC_FUNC(&msg) = U8(PAD_FUNC_GET_GP_28FDSOI_COMP); + RPC_U16(&msg, 0U) = U16(pad); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -450,22 +450,22 @@ sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad, if (fastfrz != NULL) { - *fastfrz = RPC_U8(&msg, 4U); + *fastfrz = U2B(RPC_U8(&msg, 4U)); } if (nasrc_sel != NULL) { - *nasrc_sel = RPC_U8(&msg, 5U); + *nasrc_sel = U2B(RPC_U8(&msg, 5U)); } if (compok != NULL) { - *compok = RPC_U8(&msg, 6U); + *compok = U2B(RPC_U8(&msg, 6U)); } if (psw_ovr != NULL) { - *psw_ovr = RPC_U8(&msg, 7U); + *psw_ovr = U2B(RPC_U8(&msg, 7U)); } return (sc_err_t) result; diff --git a/arch/arm/mach-imx/sci/svc/pm/rpc.h b/arch/arm/mach-imx/sci/svc/pm/rpc.h index 49046c2ca7e..cfc7bd1a8de 100644 --- a/arch/arm/mach-imx/sci/svc/pm/rpc.h +++ b/arch/arm/mach-imx/sci/svc/pm/rpc.h @@ -28,6 +28,7 @@ #define PM_FUNC_SET_PARTITION_POWER_MODE 1U /*!< Index for pm_set_partition_power_mode() RPC call */ #define PM_FUNC_GET_SYS_POWER_MODE 2U /*!< Index for pm_get_sys_power_mode() RPC call */ #define PM_FUNC_SET_RESOURCE_POWER_MODE 3U /*!< Index for pm_set_resource_power_mode() RPC call */ +#define PM_FUNC_SET_RESOURCE_POWER_MODE_ALL 22U /*!< Index for pm_set_resource_power_mode_all() RPC call */ #define PM_FUNC_GET_RESOURCE_POWER_MODE 4U /*!< Index for pm_get_resource_power_mode() RPC call */ #define PM_FUNC_REQ_LOW_POWER_MODE 16U /*!< Index for pm_req_low_power_mode() RPC call */ #define PM_FUNC_REQ_CPU_LOW_POWER_MODE 20U /*!< Index for pm_req_cpu_low_power_mode() RPC call */ @@ -45,6 +46,7 @@ #define PM_FUNC_REBOOT 9U /*!< Index for pm_reboot() RPC call */ #define PM_FUNC_REBOOT_PARTITION 12U /*!< Index for pm_reboot_partition() RPC call */ #define PM_FUNC_CPU_START 11U /*!< Index for pm_cpu_start() RPC call */ +#define PM_FUNC_CPU_RESET 23U /*!< Index for pm_cpu_reset() RPC call */ /*@}*/ /* Types */ @@ -59,14 +61,6 @@ */ void pm_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); -/*! - * This function translates and dispatches an PM RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void pm_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); - #endif /* SC_PM_RPC_H */ /**@}*/ diff --git a/arch/arm/mach-imx/sci/svc/pm/rpc_clnt.c b/arch/arm/mach-imx/sci/svc/pm/rpc_clnt.c index 5c48981f4f4..467f51affac 100644 --- a/arch/arm/mach-imx/sci/svc/pm/rpc_clnt.c +++ b/arch/arm/mach-imx/sci/svc/pm/rpc_clnt.c @@ -33,9 +33,9 @@ sc_err_t sc_pm_set_sys_power_mode(sc_ipc_t ipc, sc_pm_power_mode_t mode) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_SET_SYS_POWER_MODE; - RPC_U8(&msg, 0U) = (uint8_t) mode; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_SYS_POWER_MODE); + RPC_U8(&msg, 0U) = U8(mode); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -51,10 +51,10 @@ sc_err_t sc_pm_set_partition_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_SET_PARTITION_POWER_MODE; - RPC_U8(&msg, 0U) = (uint8_t) pt; - RPC_U8(&msg, 1U) = (uint8_t) mode; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_PARTITION_POWER_MODE); + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(mode); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -70,9 +70,9 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_GET_SYS_POWER_MODE; - RPC_U8(&msg, 0U) = (uint8_t) pt; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_GET_SYS_POWER_MODE); + RPC_U8(&msg, 0U) = U8(pt); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -93,10 +93,30 @@ sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_SET_RESOURCE_POWER_MODE; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) mode; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_RESOURCE_POWER_MODE); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(mode); + RPC_SIZE(&msg) = 2U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc, + sc_rm_pt_t pt, sc_pm_power_mode_t mode, sc_rsrc_t exclude) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_RESOURCE_POWER_MODE_ALL); + RPC_U16(&msg, 0U) = U16(exclude); + RPC_U8(&msg, 2U) = U8(pt); + RPC_U8(&msg, 3U) = U8(mode); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -112,9 +132,9 @@ sc_err_t sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_GET_RESOURCE_POWER_MODE; - RPC_U16(&msg, 0U) = (uint16_t) resource; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_GET_RESOURCE_POWER_MODE); + RPC_U16(&msg, 0U) = U16(resource); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -135,10 +155,10 @@ sc_err_t sc_pm_req_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_REQ_LOW_POWER_MODE; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) mode; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REQ_LOW_POWER_MODE); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(mode); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -154,11 +174,11 @@ sc_err_t sc_pm_req_cpu_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_REQ_CPU_LOW_POWER_MODE; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) mode; - RPC_U8(&msg, 3U) = (uint8_t) wake_src; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REQ_CPU_LOW_POWER_MODE); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(mode); + RPC_U8(&msg, 3U) = U8(wake_src); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -174,11 +194,11 @@ sc_err_t sc_pm_set_cpu_resume_addr(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_SET_CPU_RESUME_ADDR; - RPC_U32(&msg, 0U) = (uint32_t) (address >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) address; - RPC_U16(&msg, 8U) = (uint16_t) resource; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_CPU_RESUME_ADDR); + RPC_U32(&msg, 0U) = U32(address >> 32ULL); + RPC_U32(&msg, 4U) = U32(address); + RPC_U16(&msg, 8U) = U16(resource); RPC_SIZE(&msg) = 4U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -194,12 +214,12 @@ sc_err_t sc_pm_set_cpu_resume(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_SET_CPU_RESUME; - RPC_U32(&msg, 0U) = (uint32_t) (address >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) address; - RPC_U16(&msg, 8U) = (uint16_t) resource; - RPC_U8(&msg, 10U) = (uint8_t) isPrimary; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_CPU_RESUME); + RPC_U32(&msg, 0U) = U32(address >> 32ULL); + RPC_U32(&msg, 4U) = U32(address); + RPC_U16(&msg, 8U) = U16(resource); + RPC_U8(&msg, 10U) = B2U8(isPrimary); RPC_SIZE(&msg) = 4U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -215,12 +235,12 @@ sc_err_t sc_pm_req_sys_if_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_REQ_SYS_IF_POWER_MODE; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) sys_if; - RPC_U8(&msg, 3U) = (uint8_t) hpm; - RPC_U8(&msg, 4U) = (uint8_t) lpm; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REQ_SYS_IF_POWER_MODE); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(sys_if); + RPC_U8(&msg, 3U) = U8(hpm); + RPC_U8(&msg, 4U) = U8(lpm); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -236,11 +256,11 @@ sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_SET_CLOCK_RATE; - RPC_U32(&msg, 0U) = *(uint32_t*) rate; - RPC_U16(&msg, 4U) = (uint16_t) resource; - RPC_U8(&msg, 6U) = (uint8_t) clk; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_CLOCK_RATE); + RPC_U32(&msg, 0U) = *PTR_U32(rate); + RPC_U16(&msg, 4U) = U16(resource); + RPC_U8(&msg, 6U) = U8(clk); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -257,10 +277,10 @@ sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_GET_CLOCK_RATE; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) clk; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_GET_CLOCK_RATE); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(clk); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -281,12 +301,12 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_CLOCK_ENABLE; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) clk; - RPC_U8(&msg, 3U) = (uint8_t) enable; - RPC_U8(&msg, 4U) = (uint8_t) autog; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_CLOCK_ENABLE); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(clk); + RPC_U8(&msg, 3U) = B2U8(enable); + RPC_U8(&msg, 4U) = B2U8(autog); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -302,11 +322,11 @@ sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_SET_CLOCK_PARENT; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) clk; - RPC_U8(&msg, 3U) = (uint8_t) parent; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_SET_CLOCK_PARENT); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(clk); + RPC_U8(&msg, 3U) = U8(parent); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -322,10 +342,10 @@ sc_err_t sc_pm_get_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_GET_CLOCK_PARENT; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) clk; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_GET_CLOCK_PARENT); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(clk); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -345,9 +365,9 @@ sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_RESET; - RPC_U8(&msg, 0U) = (uint8_t) type; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_RESET); + RPC_U8(&msg, 0U) = U8(type); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -362,8 +382,8 @@ sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_RESET_REASON; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_RESET_REASON); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -385,14 +405,14 @@ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_BOOT; - RPC_U32(&msg, 0U) = (uint32_t) (boot_addr >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) boot_addr; - RPC_U16(&msg, 8U) = (uint16_t) resource_cpu; - RPC_U16(&msg, 10U) = (uint16_t) resource_mu; - RPC_U16(&msg, 12U) = (uint16_t) resource_dev; - RPC_U8(&msg, 14U) = (uint8_t) pt; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_BOOT); + RPC_U32(&msg, 0U) = U32(boot_addr >> 32ULL); + RPC_U32(&msg, 4U) = U32(boot_addr); + RPC_U16(&msg, 8U) = U16(resource_cpu); + RPC_U16(&msg, 10U) = U16(resource_mu); + RPC_U16(&msg, 12U) = U16(resource_dev); + RPC_U8(&msg, 14U) = U8(pt); RPC_SIZE(&msg) = 5U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -406,9 +426,9 @@ void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type) sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_REBOOT; - RPC_U8(&msg, 0U) = (uint8_t) type; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REBOOT); + RPC_U8(&msg, 0U) = U8(type); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_TRUE); @@ -423,10 +443,10 @@ sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_REBOOT_PARTITION; - RPC_U8(&msg, 0U) = (uint8_t) pt; - RPC_U8(&msg, 1U) = (uint8_t) type; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_REBOOT_PARTITION); + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(type); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -442,12 +462,12 @@ sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; - RPC_FUNC(&msg) = (uint8_t) PM_FUNC_CPU_START; - RPC_U32(&msg, 0U) = (uint32_t) (address >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) address; - RPC_U16(&msg, 8U) = (uint16_t) resource; - RPC_U8(&msg, 10U) = (uint8_t) enable; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_CPU_START); + RPC_U32(&msg, 0U) = U32(address >> 32ULL); + RPC_U32(&msg, 4U) = U32(address); + RPC_U16(&msg, 8U) = U16(resource); + RPC_U8(&msg, 10U) = B2U8(enable); RPC_SIZE(&msg) = 4U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -456,5 +476,22 @@ sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, return (sc_err_t) result; } +void sc_pm_cpu_reset(sc_ipc_t ipc, sc_rsrc_t resource, sc_faddr_t address) +{ + sc_rpc_msg_t msg; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = U8(PM_FUNC_CPU_RESET); + RPC_U32(&msg, 0U) = U32(address >> 32ULL); + RPC_U32(&msg, 4U) = U32(address); + RPC_U16(&msg, 8U) = U16(resource); + RPC_SIZE(&msg) = 4U; + + sc_call_rpc(ipc, &msg, SC_TRUE); + + return; +} + /**@}*/ diff --git a/arch/arm/mach-imx/sci/svc/rm/rpc.h b/arch/arm/mach-imx/sci/svc/rm/rpc.h index 196615e9370..221d09e0657 100644 --- a/arch/arm/mach-imx/sci/svc/rm/rpc.h +++ b/arch/arm/mach-imx/sci/svc/rm/rpc.h @@ -45,6 +45,7 @@ #define RM_FUNC_GET_RESOURCE_INFO 16U /*!< Index for rm_get_resource_info() RPC call */ #define RM_FUNC_MEMREG_ALLOC 17U /*!< Index for rm_memreg_alloc() RPC call */ #define RM_FUNC_MEMREG_SPLIT 29U /*!< Index for rm_memreg_split() RPC call */ +#define RM_FUNC_MEMREG_FRAG 32U /*!< Index for rm_memreg_frag() RPC call */ #define RM_FUNC_MEMREG_FREE 18U /*!< Index for rm_memreg_free() RPC call */ #define RM_FUNC_FIND_MEMREG 30U /*!< Index for rm_find_memreg() RPC call */ #define RM_FUNC_ASSIGN_MEMREG 19U /*!< Index for rm_assign_memreg() RPC call */ @@ -69,14 +70,6 @@ */ void rm_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); -/*! - * This function translates and dispatches an RM RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void rm_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); - #endif /* SC_RM_RPC_H */ /**@}*/ diff --git a/arch/arm/mach-imx/sci/svc/rm/rpc_clnt.c b/arch/arm/mach-imx/sci/svc/rm/rpc_clnt.c index 93dd7a4bd41..216ae59fb66 100644 --- a/arch/arm/mach-imx/sci/svc/rm/rpc_clnt.c +++ b/arch/arm/mach-imx/sci/svc/rm/rpc_clnt.c @@ -33,13 +33,13 @@ sc_err_t sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_PARTITION_ALLOC; - RPC_U8(&msg, 0U) = (uint8_t) secure; - RPC_U8(&msg, 1U) = (uint8_t) isolated; - RPC_U8(&msg, 2U) = (uint8_t) restricted; - RPC_U8(&msg, 3U) = (uint8_t) grant; - RPC_U8(&msg, 4U) = (uint8_t) coherent; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_PARTITION_ALLOC); + RPC_U8(&msg, 0U) = B2U8(secure); + RPC_U8(&msg, 1U) = B2U8(isolated); + RPC_U8(&msg, 2U) = B2U8(restricted); + RPC_U8(&msg, 3U) = B2U8(grant); + RPC_U8(&msg, 4U) = B2U8(coherent); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -59,10 +59,10 @@ sc_err_t sc_rm_set_confidential(sc_ipc_t ipc, sc_rm_pt_t pt, sc_bool_t retro) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_SET_CONFIDENTIAL; - RPC_U8(&msg, 0U) = (uint8_t) pt; - RPC_U8(&msg, 1U) = (uint8_t) retro; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_CONFIDENTIAL); + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = B2U8(retro); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -77,9 +77,9 @@ sc_err_t sc_rm_partition_free(sc_ipc_t ipc, sc_rm_pt_t pt) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_PARTITION_FREE; - RPC_U8(&msg, 0U) = (uint8_t) pt; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_PARTITION_FREE); + RPC_U8(&msg, 0U) = U8(pt); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -94,8 +94,8 @@ sc_rm_did_t sc_rm_get_did(sc_ipc_t ipc) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_GET_DID; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_GET_DID); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -111,10 +111,10 @@ sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_PARTITION_STATIC; - RPC_U8(&msg, 0U) = (uint8_t) pt; - RPC_U8(&msg, 1U) = (uint8_t) did; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_PARTITION_STATIC); + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(did); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -129,9 +129,9 @@ sc_err_t sc_rm_partition_lock(sc_ipc_t ipc, sc_rm_pt_t pt) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_PARTITION_LOCK; - RPC_U8(&msg, 0U) = (uint8_t) pt; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_PARTITION_LOCK); + RPC_U8(&msg, 0U) = U8(pt); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -146,8 +146,8 @@ sc_err_t sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_GET_PARTITION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_GET_PARTITION); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -168,10 +168,10 @@ sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_SET_PARENT; - RPC_U8(&msg, 0U) = (uint8_t) pt; - RPC_U8(&msg, 1U) = (uint8_t) pt_parent; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_PARENT); + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(pt_parent); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -187,12 +187,12 @@ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_MOVE_ALL; - RPC_U8(&msg, 0U) = (uint8_t) pt_src; - RPC_U8(&msg, 1U) = (uint8_t) pt_dst; - RPC_U8(&msg, 2U) = (uint8_t) move_rsrc; - RPC_U8(&msg, 3U) = (uint8_t) move_pads; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_MOVE_ALL); + RPC_U8(&msg, 0U) = U8(pt_src); + RPC_U8(&msg, 1U) = U8(pt_dst); + RPC_U8(&msg, 2U) = B2U8(move_rsrc); + RPC_U8(&msg, 3U) = B2U8(move_pads); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -208,10 +208,10 @@ sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_ASSIGN_RESOURCE; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) pt; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_ASSIGN_RESOURCE); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(pt); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -227,11 +227,11 @@ sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_SET_RESOURCE_MOVABLE; - RPC_U16(&msg, 0U) = (uint16_t) resource_fst; - RPC_U16(&msg, 2U) = (uint16_t) resource_lst; - RPC_U8(&msg, 4U) = (uint8_t) movable; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_RESOURCE_MOVABLE); + RPC_U16(&msg, 0U) = U16(resource_fst); + RPC_U16(&msg, 2U) = U16(resource_lst); + RPC_U8(&msg, 4U) = B2U8(movable); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -247,10 +247,10 @@ sc_err_t sc_rm_set_subsys_rsrc_movable(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_SET_SUBSYS_RSRC_MOVABLE; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) movable; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_SUBSYS_RSRC_MOVABLE); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = B2U8(movable); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -266,12 +266,12 @@ sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_SET_MASTER_ATTRIBUTES; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) sa; - RPC_U8(&msg, 3U) = (uint8_t) pa; - RPC_U8(&msg, 4U) = (uint8_t) smmu_bypass; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_MASTER_ATTRIBUTES); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(sa); + RPC_U8(&msg, 3U) = U8(pa); + RPC_U8(&msg, 4U) = B2U8(smmu_bypass); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -287,10 +287,10 @@ sc_err_t sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_SET_MASTER_SID; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U16(&msg, 2U) = (uint16_t) sid; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_MASTER_SID); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U16(&msg, 2U) = U16(sid); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -306,11 +306,11 @@ sc_err_t sc_rm_set_peripheral_permissions(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_SET_PERIPHERAL_PERMISSIONS; - RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_U8(&msg, 2U) = (uint8_t) pt; - RPC_U8(&msg, 3U) = (uint8_t) perm; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_PERIPHERAL_PERMISSIONS); + RPC_U16(&msg, 0U) = U16(resource); + RPC_U8(&msg, 2U) = U8(pt); + RPC_U8(&msg, 3U) = U8(perm); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -322,52 +322,52 @@ sc_err_t sc_rm_set_peripheral_permissions(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource) { sc_rpc_msg_t msg; - uint8_t result; + sc_bool_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_IS_RESOURCE_OWNED; - RPC_U16(&msg, 0U) = (uint16_t) resource; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_IS_RESOURCE_OWNED); + RPC_U16(&msg, 0U) = U16(resource); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_bool_t) result; + result = U2B(RPC_R8(&msg)); + return result; } sc_bool_t sc_rm_is_resource_master(sc_ipc_t ipc, sc_rsrc_t resource) { sc_rpc_msg_t msg; - uint8_t result; + sc_bool_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_IS_RESOURCE_MASTER; - RPC_U16(&msg, 0U) = (uint16_t) resource; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_IS_RESOURCE_MASTER); + RPC_U16(&msg, 0U) = U16(resource); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_bool_t) result; + result = U2B(RPC_R8(&msg)); + return result; } sc_bool_t sc_rm_is_resource_peripheral(sc_ipc_t ipc, sc_rsrc_t resource) { sc_rpc_msg_t msg; - uint8_t result; + sc_bool_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_IS_RESOURCE_PERIPHERAL; - RPC_U16(&msg, 0U) = (uint16_t) resource; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_IS_RESOURCE_PERIPHERAL); + RPC_U16(&msg, 0U) = U16(resource); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_bool_t) result; + result = U2B(RPC_R8(&msg)); + return result; } sc_err_t sc_rm_get_resource_info(sc_ipc_t ipc, sc_rsrc_t resource, @@ -377,9 +377,9 @@ sc_err_t sc_rm_get_resource_info(sc_ipc_t ipc, sc_rsrc_t resource, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_GET_RESOURCE_INFO; - RPC_U16(&msg, 0U) = (uint16_t) resource; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_GET_RESOURCE_INFO); + RPC_U16(&msg, 0U) = U16(resource); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -400,12 +400,12 @@ sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_MEMREG_ALLOC; - RPC_U32(&msg, 0U) = (uint32_t) (addr_start >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) addr_start; - RPC_U32(&msg, 8U) = (uint32_t) (addr_end >> 32U); - RPC_U32(&msg, 12U) = (uint32_t) addr_end; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_MEMREG_ALLOC); + RPC_U32(&msg, 0U) = U32(addr_start >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr_start); + RPC_U32(&msg, 8U) = U32(addr_end >> 32ULL); + RPC_U32(&msg, 12U) = U32(addr_end); RPC_SIZE(&msg) = 5U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -426,13 +426,13 @@ sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_MEMREG_SPLIT; - RPC_U32(&msg, 0U) = (uint32_t) (addr_start >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) addr_start; - RPC_U32(&msg, 8U) = (uint32_t) (addr_end >> 32U); - RPC_U32(&msg, 12U) = (uint32_t) addr_end; - RPC_U8(&msg, 16U) = (uint8_t) mr; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_MEMREG_SPLIT); + RPC_U32(&msg, 0U) = U32(addr_start >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr_start); + RPC_U32(&msg, 8U) = U32(addr_end >> 32ULL); + RPC_U32(&msg, 12U) = U32(addr_end); + RPC_U8(&msg, 16U) = U8(mr); RPC_SIZE(&msg) = 6U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -446,15 +446,41 @@ sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr, return (sc_err_t) result; } +sc_err_t sc_rm_memreg_frag(sc_ipc_t ipc, sc_rm_mr_t *mr_ret, + sc_faddr_t addr_start, sc_faddr_t addr_end) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_MEMREG_FRAG); + RPC_U32(&msg, 0U) = U32(addr_start >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr_start); + RPC_U32(&msg, 8U) = U32(addr_end >> 32ULL); + RPC_U32(&msg, 12U) = U32(addr_end); + RPC_SIZE(&msg) = 5U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + if (mr_ret != NULL) + { + *mr_ret = RPC_U8(&msg, 0U); + } + + return (sc_err_t) result; +} + sc_err_t sc_rm_memreg_free(sc_ipc_t ipc, sc_rm_mr_t mr) { sc_rpc_msg_t msg; uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_MEMREG_FREE; - RPC_U8(&msg, 0U) = (uint8_t) mr; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_MEMREG_FREE); + RPC_U8(&msg, 0U) = U8(mr); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -470,12 +496,12 @@ sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_FIND_MEMREG; - RPC_U32(&msg, 0U) = (uint32_t) (addr_start >> 32U); - RPC_U32(&msg, 4U) = (uint32_t) addr_start; - RPC_U32(&msg, 8U) = (uint32_t) (addr_end >> 32U); - RPC_U32(&msg, 12U) = (uint32_t) addr_end; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_FIND_MEMREG); + RPC_U32(&msg, 0U) = U32(addr_start >> 32ULL); + RPC_U32(&msg, 4U) = U32(addr_start); + RPC_U32(&msg, 8U) = U32(addr_end >> 32ULL); + RPC_U32(&msg, 12U) = U32(addr_end); RPC_SIZE(&msg) = 5U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -495,10 +521,10 @@ sc_err_t sc_rm_assign_memreg(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_mr_t mr) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_ASSIGN_MEMREG; - RPC_U8(&msg, 0U) = (uint8_t) pt; - RPC_U8(&msg, 1U) = (uint8_t) mr; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_ASSIGN_MEMREG); + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(mr); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -514,11 +540,11 @@ sc_err_t sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_SET_MEMREG_PERMISSIONS; - RPC_U8(&msg, 0U) = (uint8_t) mr; - RPC_U8(&msg, 1U) = (uint8_t) pt; - RPC_U8(&msg, 2U) = (uint8_t) perm; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_MEMREG_PERMISSIONS); + RPC_U8(&msg, 0U) = U8(mr); + RPC_U8(&msg, 1U) = U8(pt); + RPC_U8(&msg, 2U) = U8(perm); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -530,18 +556,18 @@ sc_err_t sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr, sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr) { sc_rpc_msg_t msg; - uint8_t result; + sc_bool_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_IS_MEMREG_OWNED; - RPC_U8(&msg, 0U) = (uint8_t) mr; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_IS_MEMREG_OWNED); + RPC_U8(&msg, 0U) = U8(mr); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_bool_t) result; + result = U2B(RPC_R8(&msg)); + return result; } sc_err_t sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, @@ -551,9 +577,9 @@ sc_err_t sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_GET_MEMREG_INFO; - RPC_U8(&msg, 0U) = (uint8_t) mr; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_GET_MEMREG_INFO); + RPC_U8(&msg, 0U) = U8(mr); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -578,10 +604,10 @@ sc_err_t sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_ASSIGN_PAD; - RPC_U16(&msg, 0U) = (uint16_t) pad; - RPC_U8(&msg, 2U) = (uint8_t) pt; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_ASSIGN_PAD); + RPC_U16(&msg, 0U) = U16(pad); + RPC_U8(&msg, 2U) = U8(pt); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -597,11 +623,11 @@ sc_err_t sc_rm_set_pad_movable(sc_ipc_t ipc, sc_pad_t pad_fst, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_SET_PAD_MOVABLE; - RPC_U16(&msg, 0U) = (uint16_t) pad_fst; - RPC_U16(&msg, 2U) = (uint16_t) pad_lst; - RPC_U8(&msg, 4U) = (uint8_t) movable; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_SET_PAD_MOVABLE); + RPC_U16(&msg, 0U) = U16(pad_fst); + RPC_U16(&msg, 2U) = U16(pad_lst); + RPC_U8(&msg, 4U) = B2U8(movable); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -613,18 +639,18 @@ sc_err_t sc_rm_set_pad_movable(sc_ipc_t ipc, sc_pad_t pad_fst, sc_bool_t sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad) { sc_rpc_msg_t msg; - uint8_t result; + sc_bool_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_IS_PAD_OWNED; - RPC_U8(&msg, 0U) = (uint8_t) pad; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_IS_PAD_OWNED); + RPC_U8(&msg, 0U) = U8(pad); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); - result = RPC_R8(&msg); - return (sc_bool_t) result; + result = U2B(RPC_R8(&msg)); + return result; } void sc_rm_dump(sc_ipc_t ipc) @@ -632,8 +658,8 @@ void sc_rm_dump(sc_ipc_t ipc) sc_rpc_msg_t msg; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_RM; - RPC_FUNC(&msg) = (uint8_t) RM_FUNC_DUMP; + RPC_SVC(&msg) = U8(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = U8(RM_FUNC_DUMP); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); diff --git a/arch/arm/mach-imx/sci/svc/timer/rpc.h b/arch/arm/mach-imx/sci/svc/timer/rpc.h index 0c498e97f0e..a071f47f527 100644 --- a/arch/arm/mach-imx/sci/svc/timer/rpc.h +++ b/arch/arm/mach-imx/sci/svc/timer/rpc.h @@ -39,6 +39,9 @@ #define TIMER_FUNC_SET_RTC_PERIODIC_ALARM 14U /*!< Index for timer_set_rtc_periodic_alarm() RPC call */ #define TIMER_FUNC_CANCEL_RTC_ALARM 15U /*!< Index for timer_cancel_rtc_alarm() RPC call */ #define TIMER_FUNC_SET_RTC_CALB 11U /*!< Index for timer_set_rtc_calb() RPC call */ +#define TIMER_FUNC_SET_SYSCTR_ALARM 16U /*!< Index for timer_set_sysctr_alarm() RPC call */ +#define TIMER_FUNC_SET_SYSCTR_PERIODIC_ALARM 17U /*!< Index for timer_set_sysctr_periodic_alarm() RPC call */ +#define TIMER_FUNC_CANCEL_SYSCTR_ALARM 18U /*!< Index for timer_cancel_sysctr_alarm() RPC call */ /*@}*/ /* Types */ @@ -53,14 +56,6 @@ */ void timer_dispatch(sc_rm_pt_t caller_pt, sc_rpc_msg_t *msg); -/*! - * This function translates and dispatches an TIMER RPC request. - * - * @param[in] ipc IPC handle - * @param[in] msg pointer to RPC message - */ -void timer_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg); - #endif /* SC_TIMER_RPC_H */ /**@}*/ diff --git a/arch/arm/mach-imx/sci/svc/timer/rpc_clnt.c b/arch/arm/mach-imx/sci/svc/timer/rpc_clnt.c index 69c3351594d..b35572726ac 100644 --- a/arch/arm/mach-imx/sci/svc/timer/rpc_clnt.c +++ b/arch/arm/mach-imx/sci/svc/timer/rpc_clnt.c @@ -34,9 +34,9 @@ sc_err_t sc_timer_set_wdog_timeout(sc_ipc_t ipc, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_SET_WDOG_TIMEOUT; - RPC_U32(&msg, 0U) = (uint32_t) timeout; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_WDOG_TIMEOUT); + RPC_U32(&msg, 0U) = U32(timeout); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -52,9 +52,9 @@ sc_err_t sc_timer_set_wdog_pre_timeout(sc_ipc_t ipc, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_SET_WDOG_PRE_TIMEOUT; - RPC_U32(&msg, 0U) = (uint32_t) pre_timeout; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_WDOG_PRE_TIMEOUT); + RPC_U32(&msg, 0U) = U32(pre_timeout); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -69,9 +69,9 @@ sc_err_t sc_timer_start_wdog(sc_ipc_t ipc, sc_bool_t lock) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_START_WDOG; - RPC_U8(&msg, 0U) = (uint8_t) lock; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_START_WDOG); + RPC_U8(&msg, 0U) = B2U8(lock); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -86,8 +86,8 @@ sc_err_t sc_timer_stop_wdog(sc_ipc_t ipc) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_STOP_WDOG; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_STOP_WDOG); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -102,8 +102,8 @@ sc_err_t sc_timer_ping_wdog(sc_ipc_t ipc) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_PING_WDOG; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_PING_WDOG); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -120,8 +120,8 @@ sc_err_t sc_timer_get_wdog_status(sc_ipc_t ipc, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_GET_WDOG_STATUS; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_GET_WDOG_STATUS); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -152,9 +152,9 @@ sc_err_t sc_timer_pt_get_wdog_status(sc_ipc_t ipc, sc_rm_pt_t pt, sc_bool_t *enb uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_PT_GET_WDOG_STATUS; - RPC_U8(&msg, 0U) = (uint8_t) pt; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_PT_GET_WDOG_STATUS); + RPC_U8(&msg, 0U) = U8(pt); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -172,7 +172,7 @@ sc_err_t sc_timer_pt_get_wdog_status(sc_ipc_t ipc, sc_rm_pt_t pt, sc_bool_t *enb result = RPC_R8(&msg); if (enb != NULL) { - *enb = RPC_U8(&msg, 8U); + *enb = U2B(RPC_U8(&msg, 8U)); } return (sc_err_t) result; @@ -185,10 +185,10 @@ sc_err_t sc_timer_set_wdog_action(sc_ipc_t ipc, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_SET_WDOG_ACTION; - RPC_U8(&msg, 0U) = (uint8_t) pt; - RPC_U8(&msg, 1U) = (uint8_t) action; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_WDOG_ACTION); + RPC_U8(&msg, 0U) = U8(pt); + RPC_U8(&msg, 1U) = U8(action); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -204,14 +204,14 @@ sc_err_t sc_timer_set_rtc_time(sc_ipc_t ipc, uint16_t year, uint8_t mon, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_SET_RTC_TIME; - RPC_U16(&msg, 0U) = (uint16_t) year; - RPC_U8(&msg, 2U) = (uint8_t) mon; - RPC_U8(&msg, 3U) = (uint8_t) day; - RPC_U8(&msg, 4U) = (uint8_t) hour; - RPC_U8(&msg, 5U) = (uint8_t) min; - RPC_U8(&msg, 6U) = (uint8_t) sec; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_RTC_TIME); + RPC_U16(&msg, 0U) = U16(year); + RPC_U8(&msg, 2U) = U8(mon); + RPC_U8(&msg, 3U) = U8(day); + RPC_U8(&msg, 4U) = U8(hour); + RPC_U8(&msg, 5U) = U8(min); + RPC_U8(&msg, 6U) = U8(sec); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -227,8 +227,8 @@ sc_err_t sc_timer_get_rtc_time(sc_ipc_t ipc, uint16_t *year, uint8_t *mon, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_GET_RTC_TIME; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_GET_RTC_TIME); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -273,8 +273,8 @@ sc_err_t sc_timer_get_rtc_sec1970(sc_ipc_t ipc, uint32_t *sec) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_GET_RTC_SEC1970; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_GET_RTC_SEC1970); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -295,14 +295,14 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon, uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_SET_RTC_ALARM; - RPC_U16(&msg, 0U) = (uint16_t) year; - RPC_U8(&msg, 2U) = (uint8_t) mon; - RPC_U8(&msg, 3U) = (uint8_t) day; - RPC_U8(&msg, 4U) = (uint8_t) hour; - RPC_U8(&msg, 5U) = (uint8_t) min; - RPC_U8(&msg, 6U) = (uint8_t) sec; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_RTC_ALARM); + RPC_U16(&msg, 0U) = U16(year); + RPC_U8(&msg, 2U) = U8(mon); + RPC_U8(&msg, 3U) = U8(day); + RPC_U8(&msg, 4U) = U8(hour); + RPC_U8(&msg, 5U) = U8(min); + RPC_U8(&msg, 6U) = U8(sec); RPC_SIZE(&msg) = 3U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -317,9 +317,9 @@ sc_err_t sc_timer_set_rtc_periodic_alarm(sc_ipc_t ipc, uint32_t sec) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_SET_RTC_PERIODIC_ALARM; - RPC_U32(&msg, 0U) = (uint32_t) sec; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_RTC_PERIODIC_ALARM); + RPC_U32(&msg, 0U) = U32(sec); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -334,8 +334,8 @@ sc_err_t sc_timer_cancel_rtc_alarm(sc_ipc_t ipc) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_CANCEL_RTC_ALARM; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_CANCEL_RTC_ALARM); RPC_SIZE(&msg) = 1U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -350,9 +350,9 @@ sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count) uint8_t result; RPC_VER(&msg) = SC_RPC_VERSION; - RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; - RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_SET_RTC_CALB; - RPC_I8(&msg, 0U) = (int8_t) count; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_RTC_CALB); + RPC_I8(&msg, 0U) = I8(count); RPC_SIZE(&msg) = 2U; sc_call_rpc(ipc, &msg, SC_FALSE); @@ -361,5 +361,58 @@ sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count) return (sc_err_t) result; } +sc_err_t sc_timer_set_sysctr_alarm(sc_ipc_t ipc, uint64_t ticks) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_SYSCTR_ALARM); + RPC_U32(&msg, 0U) = U32(ticks >> 32ULL); + RPC_U32(&msg, 4U) = U32(ticks); + RPC_SIZE(&msg) = 3U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_timer_set_sysctr_periodic_alarm(sc_ipc_t ipc, + uint64_t ticks) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_SET_SYSCTR_PERIODIC_ALARM); + RPC_U32(&msg, 0U) = U32(ticks >> 32ULL); + RPC_U32(&msg, 4U) = U32(ticks); + RPC_SIZE(&msg) = 3U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_timer_cancel_sysctr_alarm(sc_ipc_t ipc) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = U8(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = U8(TIMER_FUNC_CANCEL_SYSCTR_ALARM); + RPC_SIZE(&msg) = 1U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + /**@}*/ |