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authorNishanth Menon <nm@ti.com>2021-05-04 18:00:54 -0500
committerLokesh Vutla <lokeshvutla@ti.com>2021-05-12 16:31:16 +0530
commitd3fd37b8a1c05e528b7a2a64c8b2d154d7b62f8b (patch)
tree4ae0f5230e0285fc9ac0bf9dedbb219e0ea94c65 /arch
parentd411f0973aa62ce426f901594367f9344261446d (diff)
arm: dts: k3-am64-main: Add GPIO nodes
Add main domain GPIO nodes. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/k3-am64-main.dtsi44
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
index 5f85950daef..ff65857d1eb 100644
--- a/arch/arm/dts/k3-am64-main.dtsi
+++ b/arch/arm/dts/k3-am64-main.dtsi
@@ -402,4 +402,48 @@
ti,otap-del-sel-ddr50 = <0x9>;
ti,clkbuf-sel = <0x7>;
};
+
+ main_gpio0: gpio@600000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00600000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <77 0 IRQ_TYPE_EDGE_RISING>,
+ <77 1 IRQ_TYPE_EDGE_RISING>,
+ <77 2 IRQ_TYPE_EDGE_RISING>,
+ <77 3 IRQ_TYPE_EDGE_RISING>,
+ <77 4 IRQ_TYPE_EDGE_RISING>,
+ <77 5 IRQ_TYPE_EDGE_RISING>,
+ <77 6 IRQ_TYPE_EDGE_RISING>,
+ <77 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 77 0>;
+ clock-names = "gpio";
+ };
+
+ main_gpio1: gpio@601000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00601000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <78 0 IRQ_TYPE_EDGE_RISING>,
+ <78 1 IRQ_TYPE_EDGE_RISING>,
+ <78 2 IRQ_TYPE_EDGE_RISING>,
+ <78 3 IRQ_TYPE_EDGE_RISING>,
+ <78 4 IRQ_TYPE_EDGE_RISING>,
+ <78 5 IRQ_TYPE_EDGE_RISING>,
+ <78 6 IRQ_TYPE_EDGE_RISING>,
+ <78 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 78 0>;
+ clock-names = "gpio";
+ };
};