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authorJudith Mendez <jm@ti.com>2023-11-14 12:41:44 -0600
committerPraneeth Bajjuri <praneeth@ti.com>2023-11-14 17:24:31 -0600
commit8c121e6e3c7fd7be6e727ddd41880c202fb6e223 (patch)
tree806bbdb73b74b8ee42f419d8509d0747c9151377 /arch
parent1186f94f42774b3850ee7ea9ee79397c0a7cf23c (diff)
HACK: arm: dts: k3-am62p: add dll delay mapping for emmc
Add in the input and output delay values for the available speed modes for the MMC controller for eMMC for the am62p5 allowing it to operate that the highest speed modes available. The patch is labeled as a HACK because the HS200 and HS400 values have not been finalized as of yet even though they have been tested. Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Judith Mendez <jm@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/k3-am62p-main.dtsi17
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/dts/k3-am62p-main.dtsi b/arch/arm/dts/k3-am62p-main.dtsi
index aa93d9edf4..0994cff30d 100644
--- a/arch/arm/dts/k3-am62p-main.dtsi
+++ b/arch/arm/dts/k3-am62p-main.dtsi
@@ -577,8 +577,23 @@
assigned-clocks = <&k3_clks 57 2>;
assigned-clock-parents = <&k3_clks 57 4>;
bus-width = <8>;
- ti,otap-del-sel-legacy = <0x0>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ ti,clkbuf-sel = <0x7>;
+ ti,strobe-sel = <0x77>;
ti,trm-icp = <0x8>;
+ ti,otap-del-sel-legacy = <0x1>;
+ ti,otap-del-sel-sdr12 = <0xf>;
+ ti,otap-del-sel-sdr25 = <0xf>;
+ ti,otap-del-sel-sdr50 = <0x8>;
+ ti,otap-del-sel-ddr50 = <0x5>;
+ ti,otap-del-sel-sdr104 = <0x8>;
+ ti,otap-del-sel-hs200 = <0x5>;
+ ti,otap-del-sel-hs400 = <0x5>;
+ ti,itap-del-sel-legacy = <0x10>;
+ ti,itap-del-sel-sdr12 = <0x8>;
+ ti,itap-del-sel-sdr25 = <0x8>;
status = "disabled";
};