diff options
author | Ravi Gunasekaran <r-gunasekaran@ti.com> | 2024-02-14 16:22:02 +0530 |
---|---|---|
committer | Francesco Dolcini <francesco.dolcini@toradex.com> | 2024-03-21 14:26:33 +0000 |
commit | 54850be4da71e3601a39193d2bf279567ff12cbb (patch) | |
tree | cfd82dfa53ae56768934d522f662acb6e0753cdc /arch | |
parent | 42e29f2f41f56e8b98608222123c833f45fbcff2 (diff) |
arm: dts: ti: k3-j722s: Enable USB support
Update the USB0, USB1 nodes and enable them.
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/k3-j722s-evm-u-boot.dtsi | 17 | ||||
-rw-r--r-- | arch/arm/dts/k3-j722s-evm.dts | 49 |
2 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j722s-evm-u-boot.dtsi b/arch/arm/dts/k3-j722s-evm-u-boot.dtsi index cb5e8e53c0..55f70ef969 100644 --- a/arch/arm/dts/k3-j722s-evm-u-boot.dtsi +++ b/arch/arm/dts/k3-j722s-evm-u-boot.dtsi @@ -33,3 +33,20 @@ bootph-pre-ram; }; }; + +&usbss0 { + bootph-pre-ram; +}; + +&usb0 { + dr_mode = "peripheral"; + bootph-pre-ram; +}; + +&usbss1 { + status = "disabled"; +}; + +&usb1 { + status = "disabled"; +}; diff --git a/arch/arm/dts/k3-j722s-evm.dts b/arch/arm/dts/k3-j722s-evm.dts index 193ce9a551..799d623e81 100644 --- a/arch/arm/dts/k3-j722s-evm.dts +++ b/arch/arm/dts/k3-j722s-evm.dts @@ -12,6 +12,8 @@ #include "k3-j722s.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/net/ti-dp83867.h> +#include <dt-bindings/mux/ti-serdes.h> +#include <dt-bindings/phy/phy.h> / { compatible = "ti,j722s-evm", "ti,j722s"; @@ -22,6 +24,8 @@ serial2 = &main_uart0; mmc0 = &sdhci0; mmc1 = &sdhci1; + usb0 = &usb0; + usb1 = &usb1; }; chosen { @@ -283,6 +287,12 @@ J722S_IOPAD(0x0244, PIN_INPUT, 7) /* (A24) MMC1_SDWP */ >; }; + + main_usb1_pins_default: main-usb1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0258, PIN_INPUT, 0) /* (B27) USB1_DRVVBUS */ + >; + }; }; &main_gpio1 { @@ -486,3 +496,42 @@ memory-region = <&c7x_1_dma_memory_region>, <&c7x_1_memory_region>; }; + +&serdes0_ln_ctrl { + idle-states = <J722S_SERDES0_LANE0_USB>; +}; + +&serdes0 { + status = "okay"; + serdes0_usb_link: phy@0 { + reg = <0>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_USB3>; + resets = <&serdes_wiz0 1>; + }; +}; + +&usbss0 { + status = "okay"; + ti,vbus-divider; +}; + +&usb0 { + dr_mode = "otg"; + usb-role-switch; +}; + +&usbss1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_usb1_pins_default>; + ti,vbus-divider; +}; + +&usb1 { + dr_mode = "host"; + maximum-speed = "super-speed"; + phys = <&serdes0_usb_link>; + phy-names = "cdns3,usb3-phy"; +}; |