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authorEmanuele Ghidoli <emanuele.ghidoli@toradex.com>2024-05-14 16:25:46 +0200
committerEmanuele Ghidoli <emanuele.ghidoli@toradex.com>2024-05-15 10:07:31 +0200
commit24ef9f2cb93689a285c111b6da467700f1a44991 (patch)
treef274578312a1ee33c3fc4b4985274a35b2825bba /arch
parent2b21f7fe27595813c7ea3aa3769382ed73d36959 (diff)
arm: dts: k3-am625-verdin: Update autogenerated LPDDR4 configuration
Update the autogenerated LPDDR4 configuration using the latest available SysConfig tool. This changes are cosmetic and are made to track the last used tool version. Upstream-Status: Submitted [https://lore.kernel.org/all/20240515080058.1530985-1-ghidoliemanuele@gmail.com/] Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi b/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
index 841541bb24..ca883ae82c 100644
--- a/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
@@ -1,8 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* This file was generated with the
- * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.09.10
- * Mon Dec 11 2023 17:07:35 GMT+0100 (Central European Standard Time)
+ * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.10.01
+ * Tue May 14 2024 12:55:28 GMT+0200 (Central European Summer Time)
* DDR Type: LPDDR4
* F0 = 50MHz F1 = NA F2 = 800MHz
* Density (per channel): 16Gb
@@ -10,9 +10,11 @@
* Number of Ranks: 1
*/
+
#define DDRSS_PLL_FHS_CNT 3
#define DDRSS_PLL_FREQUENCY_1 400000000
#define DDRSS_PLL_FREQUENCY_2 400000000
+#define DDRSS_SDRAM_IDX 15
#define DDRSS_CTL_0_DATA 0x00000B00