global: Migrate CONFIG_MAX_MEM_MAPPED to CFG

Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED

Signed-off-by: Tom Rini <trini@konsulko.com>

9 files changed, 29 insertions, 29 deletions

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 2aeec7dea7..5c45c2a5ed 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1308,13 +1308,13 @@ phys_size_t get_effective_memsize(void)
 	 * allocated from first region. If the memory extends to  the second
 	 * region (or the third region if applicable), Management Complex (MC)
 	 * memory should be put into the highest region, i.e. the end of DDR
-	 * memory. CONFIG_MAX_MEM_MAPPED is set to the size of first region so
+	 * memory. CFG_MAX_MEM_MAPPED is set to the size of first region so
 	 * U-Boot doesn't relocate itself into higher address. Should DDR be
 	 * configured to skip the first region, this function needs to be
 	 * adjusted.
 	 */
-	if (gd->ram_size > CONFIG_MAX_MEM_MAPPED) {
-		ea_size = CONFIG_MAX_MEM_MAPPED;
+	if (gd->ram_size > CFG_MAX_MEM_MAPPED) {
+		ea_size = CFG_MAX_MEM_MAPPED;
 		rem = gd->ram_size - ea_size;
 	} else {
 		ea_size = gd->ram_size;
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 57d92f6552..12758c8dd1 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -36,7 +36,7 @@
 
 /* DDR */
 #define CFG_SYS_DDR_BLOCK1_SIZE	((phys_size_t)2 << 30)
-#define CONFIG_MAX_MEM_MAPPED		CFG_SYS_DDR_BLOCK1_SIZE
+#define CFG_MAX_MEM_MAPPED		CFG_SYS_DDR_BLOCK1_SIZE
 
 /* Generic Interrupt Controller Definitions */
 #define GICD_BASE			0x06000000
@@ -121,7 +121,7 @@
 
 /* DDR */
 #define CFG_SYS_DDR_BLOCK1_SIZE	((phys_size_t)2 << 30)
-#define CONFIG_MAX_MEM_MAPPED		CFG_SYS_DDR_BLOCK1_SIZE
+#define CFG_MAX_MEM_MAPPED		CFG_SYS_DDR_BLOCK1_SIZE
 
 /* DCFG - GUR */
 #define CFG_SYS_FSL_OCRAM_BASE	0x18000000 /* initial RAM */
@@ -147,7 +147,7 @@
 
 /* DDR */
 #define CFG_SYS_DDR_BLOCK1_SIZE		((phys_size_t)2 << 30)
-#define CONFIG_MAX_MEM_MAPPED			CFG_SYS_DDR_BLOCK1_SIZE
+#define CFG_MAX_MEM_MAPPED			CFG_SYS_DDR_BLOCK1_SIZE
 
 /* Generic Interrupt Controller Definitions */
 #define GICD_BASE				0x06000000
@@ -191,7 +191,7 @@
 
 /* DDR */
 #define CFG_SYS_DDR_BLOCK1_SIZE	((phys_size_t)2 << 30)
-#define CONFIG_MAX_MEM_MAPPED		CFG_SYS_DDR_BLOCK1_SIZE
+#define CFG_MAX_MEM_MAPPED		CFG_SYS_DDR_BLOCK1_SIZE
 
 /* SEC */
 
@@ -211,7 +211,7 @@
 #define CFG_SYS_NUM_FM1_DTSEC		7
 #define CFG_SYS_NUM_FM1_10GEC		1
 #define CFG_SYS_DDR_BLOCK1_SIZE		((phys_size_t)2 << 30)
-#define CONFIG_MAX_MEM_MAPPED			CFG_SYS_DDR_BLOCK1_SIZE
+#define CFG_MAX_MEM_MAPPED			CFG_SYS_DDR_BLOCK1_SIZE
 
 #define QE_MURAM_SIZE		0x6000UL
 #define MAX_QE_RISC		1
@@ -250,14 +250,14 @@
 #define GICD_BASE		0x01401000
 #define GICC_BASE		0x01402000
 #define CFG_SYS_DDR_BLOCK1_SIZE	((phys_size_t)2 << 30)
-#define CONFIG_MAX_MEM_MAPPED		CFG_SYS_DDR_BLOCK1_SIZE
+#define CFG_MAX_MEM_MAPPED		CFG_SYS_DDR_BLOCK1_SIZE
 
 #elif defined(CONFIG_ARCH_LS1046A)
 #define CFG_SYS_NUM_FMAN			1
 #define CFG_SYS_NUM_FM1_DTSEC		8
 #define CFG_SYS_NUM_FM1_10GEC		2
 #define CFG_SYS_DDR_BLOCK1_SIZE  ((phys_size_t)2 << 30)
-#define CONFIG_MAX_MEM_MAPPED           CFG_SYS_DDR_BLOCK1_SIZE
+#define CFG_MAX_MEM_MAPPED           CFG_SYS_DDR_BLOCK1_SIZE
 
 /* SMMU Defintions */
 #define SMMU_BASE		0x09000000
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 4a4d642441..d0abbdadf0 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -70,7 +70,7 @@
 /* SATA */
 #define AHCI_BASE_ADDR				(CONFIG_SYS_IMMR + 0x02200000)
 #ifdef CONFIG_DDR_SPD
-#define CONFIG_MAX_MEM_MAPPED			((phys_size_t)2 << 30)
+#define CFG_MAX_MEM_MAPPED			((phys_size_t)2 << 30)
 #endif
 
 #define DCU_LAYER_MAX_NUM			16
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index be85c54e48..0abcc01b85 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -616,12 +616,12 @@ static int reset_tlb(phys_addr_t p_addr, u32 size, phys_addr_t *phys_offset)
 /*
  * slide the testing window up to test another area
  * for 32_bit system, the maximum testable memory is limited to
- * CONFIG_MAX_MEM_MAPPED
+ * CFG_MAX_MEM_MAPPED
  */
 int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
 {
 	phys_addr_t test_cap, p_addr;
-	phys_size_t p_size = min(gd->ram_size, CONFIG_MAX_MEM_MAPPED);
+	phys_size_t p_size = min(gd->ram_size, CFG_MAX_MEM_MAPPED);
 
 #if !defined(CONFIG_PHYS_64BIT) || \
     !defined(CFG_SYS_INIT_RAM_ADDR_PHYS) || \
@@ -632,7 +632,7 @@ int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
 #endif
 	p_addr = (*vstart) + (*size) + (*phys_offset);
 	if (p_addr < test_cap - 1) {
-		p_size = min(test_cap - p_addr, CONFIG_MAX_MEM_MAPPED);
+		p_size = min(test_cap - p_addr, CFG_MAX_MEM_MAPPED);
 		if (reset_tlb(p_addr, p_size, phys_offset) == -1)
 			return -1;
 		*vstart = CFG_SYS_DDR_SDRAM_BASE;
@@ -649,18 +649,18 @@ int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
 /* initialization for testing area */
 int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
 {
-	phys_size_t p_size = min(gd->ram_size, CONFIG_MAX_MEM_MAPPED);
+	phys_size_t p_size = min(gd->ram_size, CFG_MAX_MEM_MAPPED);
 
 	*vstart = CFG_SYS_DDR_SDRAM_BASE;
-	*size = (u32) p_size;	/* CONFIG_MAX_MEM_MAPPED < 4G */
+	*size = (u32) p_size;	/* CFG_MAX_MEM_MAPPED < 4G */
 	*phys_offset = 0;
 
 #if !defined(CONFIG_PHYS_64BIT) || \
     !defined(CFG_SYS_INIT_RAM_ADDR_PHYS) || \
 	(CFG_SYS_INIT_RAM_ADDR_PHYS < 0x100000000ull)
-		if (gd->ram_size > CONFIG_MAX_MEM_MAPPED) {
+		if (gd->ram_size > CFG_MAX_MEM_MAPPED) {
 			puts("Cannot test more than ");
-			print_size(CONFIG_MAX_MEM_MAPPED,
+			print_size(CFG_MAX_MEM_MAPPED,
 				" without proper 36BIT support.\n");
 		}
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 44f8ed8a19..7c47e415f0 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -193,8 +193,8 @@ u32 determine_mp_bootpg(unsigned int *pagesize)
 
 
 	/* use last 4K of mapped memory */
-	bootpg = ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
-		CONFIG_MAX_MEM_MAPPED : gd->ram_size) +
+	bootpg = ((gd->ram_size > CFG_MAX_MEM_MAPPED) ?
+		CFG_MAX_MEM_MAPPED : gd->ram_size) +
 		CFG_SYS_SDRAM_BASE - 4096;
 	if (pagesize)
 		*pagesize = 4096;
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 5d21bef587..2a78f0fe50 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -306,12 +306,12 @@ unsigned int setup_ddr_tlbs_phys(phys_addr_t p_addr,
 	u64 memsize = (u64)memsize_in_meg << 20;
 	u64 size;
 
-	size = min(memsize, (u64)CONFIG_MAX_MEM_MAPPED);
+	size = min(memsize, (u64)CFG_MAX_MEM_MAPPED);
 	size = tlb_map_range(ram_tlb_address, p_addr, size, TLB_MAP_RAM);
 
-	if (size || memsize > CONFIG_MAX_MEM_MAPPED) {
-		print_size(memsize > CONFIG_MAX_MEM_MAPPED ?
-			   memsize - CONFIG_MAX_MEM_MAPPED + size : size,
+	if (size || memsize > CFG_MAX_MEM_MAPPED) {
+		print_size(memsize > CFG_MAX_MEM_MAPPED ?
+			   memsize - CFG_MAX_MEM_MAPPED + size : size,
 			   " of DDR memory left unmapped in U-Boot\n");
 #ifndef CONFIG_SPL_BUILD
 		puts("       ");
diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c
index caad6670cc..b906279226 100644
--- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c
+++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c
@@ -17,7 +17,7 @@ void construct_pamu_addr_table(struct pamu_addr_tbl *tbl, int *num_entries)
 
 	tbl->start_addr[i] =
 			(uint64_t)virt_to_phys((void *)CFG_SYS_SDRAM_BASE);
-	tbl->size[i] = (phys_size_t)(min(gd->ram_size, CONFIG_MAX_MEM_MAPPED));
+	tbl->size[i] = (phys_size_t)(min(gd->ram_size, CFG_MAX_MEM_MAPPED));
 	tbl->end_addr[i] = tbl->start_addr[i] +  tbl->size[i] - 1;
 
 	i++;
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index 983c6f70cf..f0702cab14 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -14,13 +14,13 @@
   #define HWCONFIG_BUFFER_SIZE 256
 #endif
 
-#ifndef CONFIG_MAX_MEM_MAPPED
+#ifndef CFG_MAX_MEM_MAPPED
 #if	defined(CONFIG_E500)		|| \
 	defined(CONFIG_MPC86xx)		|| \
 	defined(CONFIG_E300)
-#define CONFIG_MAX_MEM_MAPPED	((phys_size_t)2 << 30)
+#define CFG_MAX_MEM_MAPPED	((phys_size_t)2 << 30)
 #else
-#define CONFIG_MAX_MEM_MAPPED	(256 << 20)
+#define CFG_MAX_MEM_MAPPED	(256 << 20)
 #endif
 #endif
 
diff --git a/arch/xtensa/include/asm/config.h b/arch/xtensa/include/asm/config.h
index 21b334b938..268c5688b3 100644
--- a/arch/xtensa/include/asm/config.h
+++ b/arch/xtensa/include/asm/config.h
@@ -14,7 +14,7 @@
  * restricting used physical memory to the first 128MB.
  */
 #if XCHAL_HAVE_PTP_MMU
-#define CONFIG_MAX_MEM_MAPPED (128 << 20)
+#define CFG_MAX_MEM_MAPPED (128 << 20)
 #endif
 
 #endif