Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi

This contains some fixes, and the first bunch of some clean up patches
to get rid of legacy GPIO and PMIC code.
Highlight is the DM AXP PMIC driver, which is required to convert some
drivers over to use DM regulators, and also is required to get rid
of some less optimal PMIC setup code in Trusted Firmware. This isn't
enabled by any defconfig yet, but can be enabled manually and works. For
the full glory some patches are still missing, and this requires more
testing, which would be simpler if the core code is upstream.

5 files changed, 13 insertions, 40 deletions

diff --git a/arch/arm/cpu/armv7/sunxi/fel_utils.S b/arch/arm/cpu/armv7/sunxi/fel_utils.S
index b2310751d9d..78bb1657fc1 100644
--- a/arch/arm/cpu/armv7/sunxi/fel_utils.S
+++ b/arch/arm/cpu/armv7/sunxi/fel_utils.S
@@ -20,8 +20,6 @@ ENTRY(save_boot_params)
 	str	lr, [r0, #12]
 	mrc	p15, 0, lr, c12, c0, 0	@ Read VBAR
 	str	lr, [r0, #16]
-	mrc	p15, 0, lr, c1, c0, 0	@ Read CP15 Control Register
-	str	lr, [r0, #20]
 	b	save_boot_params_ret
 ENDPROC(save_boot_params)
 
@@ -29,8 +27,6 @@ ENTRY(return_to_fel)
 	mov	sp, r0
 	mov	lr, r1
 	ldr	r0, =fel_stash
-	ldr	r1, [r0, #20]
-	mcr	p15, 0, r1, c1, c0, 0	@ Write CP15 Control Register
 	ldr	r1, [r0, #16]
 	mcr	p15, 0, r1, c12, c0, 0	@ Write VBAR
 	ldr	r1, [r0, #12]
diff --git a/arch/arm/cpu/armv8/fel_utils.S b/arch/arm/cpu/armv8/fel_utils.S
index 5266515f145..2fe38a1a047 100644
--- a/arch/arm/cpu/armv8/fel_utils.S
+++ b/arch/arm/cpu/armv8/fel_utils.S
@@ -39,15 +39,15 @@ ENTRY(return_to_fel)
 	adr	x1, fel_stash_addr	// to find the fel_stash address in AA32
 	str	w2, [x1]
 
-	ldr	x0, =0xfa50392f		// CPU hotplug magic
+	ldr	w0, =0xfa50392f		// CPU hotplug magic
 #ifdef CONFIG_MACH_SUN50I_H616
-	ldr	x2, =(SUNXI_R_CPUCFG_BASE + 0x1c0)
+	ldr	w2, =(SUNXI_R_CPUCFG_BASE + 0x1c0)
 	str	w0, [x2], #0x4
 #elif CONFIG_MACH_SUN50I_H6
-	ldr	x2, =(SUNXI_RTC_BASE + 0x1b8)	// BOOT_CPU_HP_FLAG_REG
+	ldr	w2, =(SUNXI_RTC_BASE + 0x1b8)	// BOOT_CPU_HP_FLAG_REG
 	str	w0, [x2], #0x4
 #else
-	ldr	x2, =(SUNXI_CPUCFG_BASE + 0x1a4) // offset for CPU hotplug base
+	ldr	w2, =(SUNXI_CPUCFG_BASE + 0x1a4) // offset for CPU hotplug base
 	str	w0, [x2, #0x8]
 #endif
 	adr	x0, back_in_32
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index 2028d5b6a90..e959eb2a405 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -12,9 +12,7 @@
 
 / {
 	aliases {
-#ifndef CONFIG_MACH_SUNIV
 		mmc0 = &mmc0;
-#endif
 #if CONFIG_MMC_SUNXI_SLOT_EXTRA == 2
 		mmc1 = &mmc2;
 #endif
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index dbe6005daab..6417aee944b 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -652,33 +652,6 @@ config MACPWR
 	  Set the pin used to power the MAC. This takes a string in the format
 	  understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 
-config MMC0_CD_PIN
-	string "Card detect pin for mmc0"
-	default "PF6" if MACH_SUN8I_A83T || MACH_SUNXI_H3_H5 || MACH_SUN50I
-	default ""
-	---help---
-	Set the card detect pin for mmc0, leave empty to not use cd. This
-	takes a string in the format understood by sunxi_name_to_gpio, e.g.
-	PH1 for pin 1 of port H.
-
-config MMC1_CD_PIN
-	string "Card detect pin for mmc1"
-	default ""
-	---help---
-	See MMC0_CD_PIN help text.
-
-config MMC2_CD_PIN
-	string "Card detect pin for mmc2"
-	default ""
-	---help---
-	See MMC0_CD_PIN help text.
-
-config MMC3_CD_PIN
-	string "Card detect pin for mmc3"
-	default ""
-	---help---
-	See MMC0_CD_PIN help text.
-
 config MMC1_PINS_PH
 	bool "Pins for mmc1 are on Port H"
 	depends on MACH_SUN4I || MACH_SUN7I || MACH_SUN8I_R40
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 0c4b6dd1ca3..391a65a5495 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -35,7 +35,6 @@ struct fel_stash {
 	uint32_t cpsr;
 	uint32_t sctlr;
 	uint32_t vbar;
-	uint32_t cr;
 };
 
 struct fel_stash fel_stash __section(".data");
@@ -365,6 +364,7 @@ static bool sunxi_valid_emmc_boot(struct mmc *mmc)
 	struct blk_desc *bd = mmc_get_blk_desc(mmc);
 	u32 *buffer = (void *)(uintptr_t)CONFIG_TEXT_BASE;
 	struct boot_file_head *egon_head = (void *)buffer;
+	struct toc0_main_info *toc0_info = (void *)buffer;
 	int bootpart = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
 	uint32_t spl_size, emmc_checksum, chksum = 0;
 	ulong count;
@@ -391,11 +391,17 @@ static bool sunxi_valid_emmc_boot(struct mmc *mmc)
 
 	/* Read the first block to do some sanity checks on the eGON header. */
 	count = blk_dread(bd, 0, 1, buffer);
-	if (count != 1 || !sunxi_egon_valid(egon_head))
+	if (count != 1)
+		return false;
+
+	if (sunxi_egon_valid(egon_head))
+		spl_size = egon_head->length;
+	else if (sunxi_toc0_valid(toc0_info))
+		spl_size = toc0_info->length;
+	else
 		return false;
 
 	/* Read the rest of the SPL now we know it's halfway sane. */
-	spl_size = buffer[4];
 	count = blk_dread(bd, 1, DIV_ROUND_UP(spl_size, bd->blksz) - 1,
 			  buffer + bd->blksz / 4);