diff options
| author | Hari Nagalla <hnagalla@ti.com> | 2022-11-02 03:50:26 -0500 |
|---|---|---|
| committer | Anand Gadiyar <gadiyar@ti.com> | 2022-11-02 15:54:51 -0500 |
| commit | 78a217ca9ea687ee5c3e7dd3a339a1f7d136e93d (patch) | |
| tree | e972cf58eed217745958650ec542bae5ccd98eef /arch | |
| parent | b6706a5a437b5ec7670c81887bdc5bbdc1a12596 (diff) | |
arch: arm: dts: k3-j784s4: Change GTC and CPTS clock parent
Change GTC and CPTS clock parents on J784S4 to main pll0, hsdiv6 from
pll3, hsdiv1. This is because pll3, hsdiv0 sources cpsw rgmii and this
needs to be at 250MHz. And on the other hand GTC clock needs to be at
200 MHz. Since it is not possible to program the hs dividers for 250
200 MHz from same VCO frequency, move GTC and CPTS clock parents to
main pll0, hsdiv6.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Acked-by: Apurva Nandan <a-nandan@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/k3-j784s4-main.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/dts/k3-j784s4-r5-evm.dts | 2 |
3 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/dts/k3-j784s4-main.dtsi b/arch/arm/dts/k3-j784s4-main.dtsi index 56b8a616618..9fc098b6239 100644 --- a/arch/arm/dts/k3-j784s4-main.dtsi +++ b/arch/arm/dts/k3-j784s4-main.dtsi @@ -117,6 +117,8 @@ reg = <0x0 0x3d000 0x0 0x400>; clocks = <&k3_clks 62 3>; clock-names = "cpts"; + assigned-clocks = <&k3_clks 62 3>; /* CPTS_RFT_CLK */ + assigned-clock-parents = <&k3_clks 62 5>; /* MAIN_0_HSDIV6_CLK */ interrupts-extended = <&gic500 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "cpts"; ti,cpts-ext-ts-inputs = <4>; @@ -775,6 +777,8 @@ reg = <0x0 0x310d0000 0x0 0x400>; reg-names = "cpts"; clocks = <&k3_clks 282 0>; + assigned-clocks = <&k3_clks 282 0>; /* CPTS_0_RCLK */ + assigned-clock-parents = <&k3_clks 282 2>; /* MAIN_0_HSDIV6_CLK */ clock-names = "cpts"; interrupts-extended = <&main_navss_intr 391>; interrupt-names = "cpts"; diff --git a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi index 6f7343a7e1f..b855f928c4b 100644 --- a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi @@ -293,6 +293,8 @@ reg = <0x0 0x3d000 0x0 0x400>; clocks = <&k3_clks 63 3>; clock-names = "cpts"; + assigned-clocks = <&k3_clks 63 3>; /* CPTS_RFT_CLK */ + assigned-clock-parents = <&k3_clks 63 5>; /* MAIN_0_HSDIV6_CLK */ interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "cpts"; ti,cpts-ext-ts-inputs = <4>; diff --git a/arch/arm/dts/k3-j784s4-r5-evm.dts b/arch/arm/dts/k3-j784s4-r5-evm.dts index 64cdd71e6eb..4a697e27380 100644 --- a/arch/arm/dts/k3-j784s4-r5-evm.dts +++ b/arch/arm/dts/k3-j784s4-r5-evm.dts @@ -77,7 +77,7 @@ resets = <&k3_reset 202 0>; clocks = <&k3_clks 61 0>; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>; - assigned-clock-parents = <&k3_clks 61 1>; + assigned-clock-parents = <&k3_clks 61 2>; assigned-clock-rates = <200000000>, <2000000000>; ti,sci = <&sms>; ti,sci-proc-id = <32>; |