Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi

10 files changed, 79 insertions, 20 deletions

diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi
index 33b0593438..d4ff4f7039 100644
--- a/arch/arc/dts/axs10x_mb.dtsi
+++ b/arch/arc/dts/axs10x_mb.dtsi
@@ -90,14 +90,15 @@
 		};
 
 		spi0: spi@0 {
-			compatible = "snps,dw-apb-ssi";
+			compatible = "snps,axs10x-spi", "snps,dw-apb-ssi";
 			reg = <0x0 0x100>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			spi-max-frequency = <4000000>;
 			clocks = <&apbclk>;
 			clock-names = "spi_clk";
-			cs-gpio = <&cs_gpio 0>;
+			num-cs = <1>;
+			cs-gpios = <&cs_gpio 0>;
 			spi_flash@0 {
 				compatible = "jedec,spi-nor";
 				reg = <0>;
diff --git a/arch/arc/dts/hsdk-common.dtsi b/arch/arc/dts/hsdk-common.dtsi
index 9aa10e4b25..3fc82e57d7 100644
--- a/arch/arc/dts/hsdk-common.dtsi
+++ b/arch/arc/dts/hsdk-common.dtsi
@@ -128,14 +128,15 @@
 	};
 
 	spi0: spi@f0020000 {
-		compatible = "snps,dw-apb-ssi";
+		compatible = "snps,hsdk-spi", "snps,dw-apb-ssi";
 		reg = <0xf0020000 0x1000>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		spi-max-frequency = <4000000>;
 		clocks = <&cgu_clk CLK_SYS_SPI_REF>;
 		clock-names = "spi_clk";
-		cs-gpio = <&cs_gpio 0>;
+		num-cs = <1>;
+		cs-gpios = <&cs_gpio 0>;
 		spi_flash@0 {
 			compatible = "jedec,spi-nor";
 			reg = <0>;
diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index eda558f2fe..ff79d335ac 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -804,7 +804,8 @@
 		};
 
 		spi0: spi@fff00000 {
-			compatible = "snps,dw-apb-ssi";
+			compatible = "altr,socfpga-spi", "snps,dw-apb-ssi-3.20",
+				     "snps,dw-apb-ssi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0xfff00000 0x1000>;
@@ -816,7 +817,8 @@
 		};
 
 		spi1: spi@fff01000 {
-			compatible = "snps,dw-apb-ssi";
+			compatible = "altr,socfpga-spi", "snps,dw-apb-ssi-3.20",
+				     "snps,dw-apb-ssi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0xfff01000 0x1000>;
diff --git a/arch/arm/dts/socfpga_agilex.dtsi b/arch/arm/dts/socfpga_agilex.dtsi
index 179b4d5591..c3ead2d72b 100644
--- a/arch/arm/dts/socfpga_agilex.dtsi
+++ b/arch/arm/dts/socfpga_agilex.dtsi
@@ -366,7 +366,8 @@
 		};
 
 		spi0: spi@ffda4000 {
-			compatible = "snps,dw-apb-ssi";
+			compatible = "intel,agilex-spi",
+				     "snps,dw-apb-ssi-4.00a", "snps,dw-apb-ssi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0xffda4000 0x1000>;
@@ -379,7 +380,8 @@
 		};
 
 		spi1: spi@ffda5000 {
-			compatible = "snps,dw-apb-ssi";
+			compatible = "intel,agilex-spi",
+				     "snps,dw-apb-ssi-4.00a", "snps,dw-apb-ssi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0xffda5000 0x1000>;
diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi
index a598c75542..bab34ab56c 100644
--- a/arch/arm/dts/socfpga_arria10.dtsi
+++ b/arch/arm/dts/socfpga_arria10.dtsi
@@ -604,7 +604,8 @@
 		};
 
 		spi0: spi@ffda4000 {
-			compatible = "snps,dw-apb-ssi";
+			compatible = "altr,socfpga-arria10-spi",
+				     "snps,dw-apb-ssi-3.22a", "snps,dw-apb-ssi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0xffda4000 0x100>;
@@ -617,7 +618,8 @@
 		};
 
 		spi1: spi@ffda5000 {
-			compatible = "snps,dw-apb-ssi";
+			compatible = "altr,socfpga-arria10-spi",
+				     "snps,dw-apb-ssi-3.22a", "snps,dw-apb-ssi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0xffda5000 0x100>;
diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi
index cb799bc551..7a7777202c 100755
--- a/arch/arm/dts/socfpga_stratix10.dtsi
+++ b/arch/arm/dts/socfpga_stratix10.dtsi
@@ -268,7 +268,8 @@
 		 };
 
 		spi0: spi@ffda4000 {
-			compatible = "snps,dw-apb-ssi";
+			compatible = "intel,stratix10-spi",
+				     "snps,dw-apb-ssi-4.00a", "snps,dw-apb-ssi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0xffda4000 0x1000>;
@@ -281,7 +282,8 @@
 		};
 
 		spi1: spi@ffda5000 {
-			compatible = "snps,dw-apb-ssi";
+			compatible = "intel,stratix10-spi",
+				     "snps,dw-apb-ssi-4.00a", "snps,dw-apb-ssi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0xffda5000 0x1000>;
diff --git a/arch/mips/dts/mscc,jr2.dtsi b/arch/mips/dts/mscc,jr2.dtsi
index 7f5a96fecd..c44e9a2b3a 100644
--- a/arch/mips/dts/mscc,jr2.dtsi
+++ b/arch/mips/dts/mscc,jr2.dtsi
@@ -94,7 +94,7 @@
 		spi0: spi-master@101000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
-			compatible = "snps,dw-apb-ssi";
+			compatible = "mscc,jaguar2-spi", "snps,dw-apb-ssi";
 			reg = <0x101000 0x40>;
 			num-chipselect = <4>;
 			bus-num = <0>;
diff --git a/arch/mips/dts/mscc,ocelot.dtsi b/arch/mips/dts/mscc,ocelot.dtsi
index 9a187b6e58..aeb4bf8f4b 100644
--- a/arch/mips/dts/mscc,ocelot.dtsi
+++ b/arch/mips/dts/mscc,ocelot.dtsi
@@ -100,7 +100,7 @@
 		spi0: spi-master@101000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
-			compatible = "snps,dw-apb-ssi";
+			compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi";
 			reg = <0x101000 0x40>;
 			num-chipselect = <4>;
 			bus-num = <0>;
diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts
index c2beec602c..e4dea205b2 100644
--- a/arch/riscv/dts/k210-maix-bit.dts
+++ b/arch/riscv/dts/k210-maix-bit.dts
@@ -152,7 +152,7 @@
 		pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>,
 			 <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>,
 			 <K210_FPIOA(28, K210_PCF_SPI1_D0)>,
-			 <K210_FPIOA(29, K210_PCF_GPIOHS13)>;
+			 <K210_FPIOA(29, K210_PCF_GPIOHS13)>; /* cs */
 	};
 };
 
@@ -160,3 +160,47 @@
 	pinctrl-0 = <&fpioa_dvp>;
 	pinctrl-names = "default";
 };
+
+&spi0 {
+	pinctrl-0 = <&fpioa_spi0>;
+	pinctrl-names = "default";
+	num-cs = <1>;
+	cs-gpios = <&gpio0 20 0>;
+
+	panel@0 {
+		compatible = "sitronix,st7789v";
+		reg = <0>;
+		reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+		dc-gpios = <&gpio0 22 0>;
+		spi-max-frequency = <15000000>;
+		status = "disabled";
+	};
+};
+
+&spi1 {
+	pinctrl-0 = <&fpioa_spi1>;
+	pinctrl-names = "default";
+	num-cs = <1>;
+	cs-gpios = <&gpio0 13 0>;
+	status = "okay";
+
+	slot@0 {
+		compatible = "mmc-spi-slot";
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+		voltage-ranges = <3300 3300>;
+		broken-cd;
+	};
+};
+
+&spi3 {
+	status = "okay";
+
+	spi-flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+		broken-flash-reset;
+	};
+};
diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 81ef8ca4f7..81b04018c6 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -284,7 +284,8 @@
 			};
 
 			spi2: spi@50240000 {
-				compatible = "kendryte,k120-spislave",
+				compatible = "canaan,kendryte-k210-spi",
+					     "snps,dw-apb-ssi-4.01",
 					     "snps,dw-apb-ssi";
 				spi-slave;
 				reg = <0x50240000 0x100>;
@@ -495,6 +496,8 @@
 				interrupts = <24>;
 				clocks = <&sysclk K210_CLK_DVP>;
 				resets = <&sysrst K210_RST_DVP>;
+				kendryte,sysctl = <&sysctl>;
+				kendryte,misc-offset = <K210_SYSCTL_MISC>;
 				status = "disabled";
 			};
 
@@ -557,7 +560,8 @@
 			spi0: spi@52000000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				compatible = "kendryte,k210-spi",
+				compatible = "canaan,kendryte-k210-spi",
+					     "snps,dw-apb-ssi-4.01",
 					     "snps,dw-apb-ssi";
 				reg = <0x52000000 0x100>;
 				interrupts = <1>;
@@ -573,7 +577,8 @@
 			spi1: spi@53000000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				compatible = "kendryte,k210-spi",
+				compatible = "canaan,kendryte-k210-spi",
+					     "snps,dw-apb-ssi-4.01",
 					     "snps,dw-apb-ssi";
 				reg = <0x53000000 0x100>;
 				interrupts = <2>;
@@ -589,8 +594,8 @@
 			spi3: spi@54000000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				compatible = "kendryte,k210-spi",
-					     "snps,dw-apb-ssi";
+				compatible = "canaan,kendryte-k210-ssi",
+					     "snps,dwc-ssi-1.01a";
 				reg = <0x54000000 0x200>;
 				interrupts = <4>;
 				clocks = <&sysclk K210_CLK_SPI3>;