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authorAmit Singh Tomar <amittomer25@gmail.com>2016-10-21 02:24:30 +0100
committerHans de Goede <hdegoede@redhat.com>2016-10-30 11:38:04 +0100
commit9d6c9d988f0cd2fae095f1c76dc6b786a890108b (patch)
treefc40b43b090e958863d274bed5c5da8b06e79aeb /arch
parent06de0701302488b4ac08f6e6d7bb9b8fcc92f5c2 (diff)
sunxi: A64: enable USB support
Mostly by adding MACH_SUN50I to some existing #ifdefs enable support for the the HCI0 USB host controller on the A64. Fix up some minor 64-bit hiccups on the way. Add the bare minimum DT bits to the A64 .dtsi and enable the controllers and the PHY on the Pine64. This is limited to the first USB controller at the moment, which is connected to the lower USB socket on the Pine64 board. [Andre: remove unneeded defines, enable OHCI, add commit message] Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/sun50i-a64-pine64-common.dtsi12
-rw-r--r--arch/arm/dts/sun50i-a64.dtsi29
-rw-r--r--arch/arm/include/asm/arch-sunxi/cpu_sun4i.h2
-rw-r--r--arch/arm/mach-sunxi/usb_phy.c5
4 files changed, 45 insertions, 3 deletions
diff --git a/arch/arm/dts/sun50i-a64-pine64-common.dtsi b/arch/arm/dts/sun50i-a64-pine64-common.dtsi
index c0fde440f55..9ec81c65e78 100644
--- a/arch/arm/dts/sun50i-a64-pine64-common.dtsi
+++ b/arch/arm/dts/sun50i-a64-pine64-common.dtsi
@@ -79,3 +79,15 @@
pinctrl-0 = <&i2c1_pins>;
status = "okay";
};
+
+&usbphy {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 7d0dc76a11f..bef0d00be8b 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -653,5 +653,34 @@
#address-cells = <1>;
#size-cells = <0>;
};
+
+ usbphy: phy@1c1b810 {
+ compatible = "allwinner,sun50i-a64-usb-phy",
+ "allwinner,sun8i-a33-usb-phy";
+ reg = <0x01c1b810 0x14>, <0x01c1b800 0x4>;
+ reg-names = "phy_ctrl", "pmu1";
+ status = "disabled";
+ #phy-cells = <1>;
+ };
+
+ ehci1: usb@01c1b000 {
+ compatible = "allwinner,sun50i-a64-ehci",
+ "generic-ehci";
+ reg = <0x01c1b000 0x100>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usbphy 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci1: usb@01c1b400 {
+ compatible = "allwinner,sun50i-a64-ohci",
+ "generic-ohci";
+ reg = <0x01c1b400 0x100>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usbphy 1>;
+ phy-names = "usb";
+ status = "enabled";
+ };
};
};
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 5f938309150..7232f6d9277 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -56,7 +56,7 @@
#define SUNXI_USB2_BASE 0x01c1c000
#endif
#ifdef CONFIG_SUNXI_GEN_SUN6I
-#ifdef CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
#define SUNXI_USBPHY_BASE 0x01c19000
#define SUNXI_USB0_BASE 0x01c1a000
#define SUNXI_USB1_BASE 0x01c1b000
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c
index bd1bbee410b..278587b4933 100644
--- a/arch/arm/mach-sunxi/usb_phy.c
+++ b/arch/arm/mach-sunxi/usb_phy.c
@@ -146,12 +146,13 @@ __maybe_unused static void usb_phy_write(struct sunxi_usb_phy *phy, int addr,
}
}
-#if defined CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
{
+#if defined CONFIG_MACH_SUN8I_H3
if (phy->id == 0)
clrbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01);
-
+#endif
clrbits_le32(phy->base + REG_PMU_UNK_H3, 0x02);
}
#elif defined CONFIG_MACH_SUN8I_A83T