diff options
author | Franck LENORMAND <franck.lenormand@nxp.com> | 2020-01-06 18:22:51 +0100 |
---|---|---|
committer | Silvano di Ninno <silvano.dininno@nxp.com> | 2020-02-05 21:16:02 +0100 |
commit | 44d09e099a6a4c96b4fb99071a329d2222e143e4 (patch) | |
tree | 66d80078444a50b933afbea691e983ada9a9235f /arch | |
parent | f260fade38a7f03af019682c392b671bd77d69d1 (diff) |
SSI-87: imx8: snvs: Update behavior
Changes:
- warning about behavior of B0 and C0 SoCs
- support of interruption configuration
- porperly support code for 8QM
- Fix the clear acommand
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Reviewed-by: Silvano Di Ninno <silvano.dininno@nxp.com>
(cherry picked from commit 12534e02bbca7b9746a3d3e60d2f6157b9131149)
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-imx/imx8/snvs_security_sc.c | 48 |
1 files changed, 41 insertions, 7 deletions
diff --git a/arch/arm/mach-imx/imx8/snvs_security_sc.c b/arch/arm/mach-imx/imx8/snvs_security_sc.c index f445939699..5109b14b03 100644 --- a/arch/arm/mach-imx/imx8/snvs_security_sc.c +++ b/arch/arm/mach-imx/imx8/snvs_security_sc.c @@ -10,6 +10,13 @@ * - passive mode expecting VCC on the line: "_passive_vcc_" * - passive mode expecting VCC on the line: "_passive_gnd_" * - active mode: "_active_" + * + * WARNING: + * The silicon revision B0 of the iMX8QM and iMX8QXP have a bug in the SECO ROM: + * If the SSM of the SNVS changes state, the next call to SECO will trigger an + * integrity check of the SECO firmware which will fail due to incorrect CAAM + * keys hence the SECO will not respond to the call. The system will hang in + * this state until a watchdog resets the board. */ #include <command.h> @@ -87,7 +94,8 @@ struct snvs_security_sc_conf { static struct snvs_security_sc_conf snvs_default_config = { .hp = { .lock = 0x1f0703ff, - .secvio_ctl = 0x3000007f, + .secvio_intcfg = 0x8000002f, + .secvio_ctl = 0xC000007f, }, .lp = { .lock = 0x1f0003ff, @@ -114,7 +122,8 @@ static struct snvs_security_sc_conf snvs_default_config = { static struct snvs_security_sc_conf snvs_passive_vcc_config = { .hp = { .lock = 0x1f0703ff, - .secvio_ctl = 0x3000007f, + .secvio_intcfg = 0x8000002f, + .secvio_ctl = 0xC000007f, }, .lp = { .lock = 0x1f0003ff, @@ -142,7 +151,8 @@ static struct snvs_security_sc_conf snvs_passive_vcc_config = { static struct snvs_security_sc_conf snvs_passive_gnd_config = { .hp = { .lock = 0x1f0703ff, - .secvio_ctl = 0x3000007f, + .secvio_intcfg = 0x8000002f, + .secvio_ctl = 0xC000007f, }, .lp = { .lock = 0x1f0003ff, @@ -170,7 +180,8 @@ static struct snvs_security_sc_conf snvs_passive_gnd_config = { static struct snvs_security_sc_conf snvs_active_config = { .hp = { .lock = 0x1f0703ff, - .secvio_ctl = 0x3000007f, + .secvio_intcfg = 0x8000002f, + .secvio_ctl = 0xC000007f, }, .lp = { .lock = 0x1f0003ff, @@ -215,18 +226,24 @@ static struct snvs_dgo_conf snvs_dgo_default_config = { static struct snvs_dgo_conf snvs_dgo_passive_vcc_config = { .tamper_misc_ctl = 0x80000000, /* Lock the DGO */ .tamper_pull_ctl = 0x00000001, /* Pull down ET1 */ +#ifdef CONFIG_TARGET_IMX8QXP_MEK .tamper_ana_test_ctl = 0x20000000, /* Enable tamper */ +#endif /* CONFIG_TARGET_IMX8QXP_MEK */ }; static struct snvs_dgo_conf snvs_dgo_passive_gnd_config = { .tamper_misc_ctl = 0x80000000, /* Lock the DGO */ .tamper_pull_ctl = 0x00000401, /* Pull up ET1 */ +#ifdef CONFIG_TARGET_IMX8QXP_MEK .tamper_ana_test_ctl = 0x20000000, /* Enable tamper */ +#endif /* CONFIG_TARGET_IMX8QXP_MEK */ }; static struct snvs_dgo_conf snvs_dgo_active_config = { .tamper_misc_ctl = 0x80000000, /* Lock the DGO */ +#ifdef CONFIG_TARGET_IMX8QXP_MEK .tamper_ana_test_ctl = 0x20000000, /* Enable tamper */ +#endif /* CONFIG_TARGET_IMX8QXP_MEK */ }; static struct snvs_dgo_conf *get_snvs_dgo_config(void) @@ -240,6 +257,7 @@ struct tamper_pin_cfg { }; static struct tamper_pin_cfg tamper_pin_list_default_config[] = { +#ifdef CONFIG_TARGET_IMX8QXP_MEK {SC_P_CSI_D00, 0}, /* Tamp_Out0 */ {SC_P_CSI_D01, 0}, /* Tamp_Out1 */ {SC_P_CSI_D02, 0}, /* Tamp_Out2 */ @@ -250,19 +268,26 @@ static struct tamper_pin_cfg tamper_pin_list_default_config[] = { {SC_P_CSI_D07, 0}, /* Tamp_In2 */ {SC_P_CSI_HSYNC, 0}, /* Tamp_In3 */ {SC_P_CSI_VSYNC, 0}, /* Tamp_In4 */ +#endif /* CONFIG_TARGET_IMX8QXP_MEK */ }; static struct tamper_pin_cfg tamper_pin_list_passive_vcc_config[] = { +#ifdef CONFIG_TARGET_IMX8QXP_MEK {SC_P_CSI_D05, 0x1c000060}, /* Tamp_In0 */ /* Sel tamper + OD input */ +#endif /* CONFIG_TARGET_IMX8QXP_MEK */ }; static struct tamper_pin_cfg tamper_pin_list_passive_gnd_config[] = { +#ifdef CONFIG_TARGET_IMX8QXP_MEK {SC_P_CSI_D05, 0x1c000060}, /* Tamp_In0 */ /* Sel tamper + OD input */ +#endif /* CONFIG_TARGET_IMX8QXP_MEK */ }; static struct tamper_pin_cfg tamper_pin_list_active_config[] = { +#ifdef CONFIG_TARGET_IMX8QXP_MEK {SC_P_CSI_D00, 0x1a000060}, /* Tamp_Out0 */ /* Sel tamper + OD */ {SC_P_CSI_D05, 0x1c000060}, /* Tamp_In0 */ /* Sel tamper + OD input */ +#endif /* CONFIG_TARGET_IMX8QXP_MEK */ }; #define TAMPER_PIN_LIST_CHOSEN tamper_pin_list_default_config @@ -331,6 +356,7 @@ static int apply_snvs_config(struct snvs_security_sc_conf *cnf) debug("Applying config:\n" "\thp.lock = 0x%.8x\n" + "\thp.secvio_intcfg = 0x%.8x\n" "\thp.secvio_ctl = 0x%.8x\n" "\tlp.lock = 0x%.8x\n" "\tlp.secvio_ctl = 0x%.8x\n" @@ -349,6 +375,7 @@ static int apply_snvs_config(struct snvs_security_sc_conf *cnf) "\tlp.act_tamper_routing_ctl1 = 0x%.8x\n" "\tlp.act_tamper_routing_ctl2 = 0x%.8x\n", cnf->hp.lock, + cnf->hp.secvio_intcfg, cnf->hp.secvio_ctl, cnf->lp.lock, cnf->lp.secvio_ctl, @@ -425,6 +452,11 @@ static int apply_snvs_config(struct snvs_security_sc_conf *cnf) if (sciErr != SC_ERR_NONE) goto exit; + sciErr = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(hp.secvio_intcfg), + &cnf->hp.secvio_intcfg); + if (sciErr != SC_ERR_NONE) + goto exit; + /* Lock access */ sciErr = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(hp.lock), &cnf->hp.lock); if (sciErr != SC_ERR_NONE) @@ -610,6 +642,7 @@ exit: static char snvs_cfg_help_text[] = "snvs_cfg\n" "\thp.lock\n" + "\thp.secvio_intcfg\n" "\thp.secvio_ctl\n" "\tlp.lock\n" "\tlp.secvio_ctl\n" @@ -630,7 +663,7 @@ static char snvs_cfg_help_text[] = "\n" "ALL values should be in hexadecimal format"; -#define NB_REGISTERS 18 +#define NB_REGISTERS 19 static int do_snvs_cfg(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { int err = 0; @@ -642,6 +675,7 @@ static int do_snvs_cfg(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) return CMD_RET_USAGE; conf.hp.lock = simple_strtoul(argv[++idx], NULL, 16); + conf.hp.secvio_intcfg = simple_strtoul(argv[++idx], NULL, 16); conf.hp.secvio_ctl = simple_strtoul(argv[++idx], NULL, 16); conf.lp.lock = simple_strtoul(argv[++idx], NULL, 16); conf.lp.secvio_ctl = simple_strtoul(argv[++idx], NULL, 16); @@ -745,8 +779,6 @@ U_BOOT_CMD(tamper_pin_cfg, static char snvs_clear_status_help_text[] = "snvs_clear_status\n" - "\tHPSR\n" - "\tHPSVSR\n" "\tLPSR\n" "\tLPTDSR\n" "\n" @@ -803,6 +835,7 @@ static int do_snvs_sec_status(cmd_tbl_t *cmdtp, int flag, int argc, u32 data[5]; u32 pads[] = { +#ifdef CONFIG_TARGET_IMX8QXP_MEK SC_P_CSI_D00, SC_P_CSI_D01, SC_P_CSI_D02, @@ -813,6 +846,7 @@ static int do_snvs_sec_status(cmd_tbl_t *cmdtp, int flag, int argc, SC_P_CSI_D07, SC_P_CSI_HSYNC, SC_P_CSI_VSYNC, +#endif /* CONFIG_TARGET_IMX8QXP_MEK */ }; u32 fuses[] = { |