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authorBai Ping <ping.bai@nxp.com>2018-09-29 13:39:24 +0800
committerBai Ping <ping.bai@nxp.com>2018-10-01 17:25:24 +0800
commit258db72309ec47b99cec89c06f6b4491f9951b27 (patch)
treeb695025ae2e70ef66d03786f8128ca590c87ba75 /arch
parente2985a6e6437bba1b07ea88527aa83e1eda6d691 (diff)
MLK-19777-01: imx8mm: rename the lpddr4_ddrphy_train file
For LPDDR4 or DDR4, the ddr phy train flow is the same. So rename the 'lpddr4_ddrphy_train.c' to 'ddrphy_train.c'. make it more common for reuse and move it to driver/ddr/imx8m/. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-imx8m/imx8m_ddr.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-imx8m/imx8m_ddr.h b/arch/arm/include/asm/arch-imx8m/imx8m_ddr.h
index e5180e85f7..9ea4d588a4 100644
--- a/arch/arm/include/asm/arch-imx8m/imx8m_ddr.h
+++ b/arch/arm/include/asm/arch-imx8m/imx8m_ddr.h
@@ -52,7 +52,7 @@ extern struct dram_timing_info lpddr4_timing;
void ddr_load_train_firmware(enum fw_type type);
void ddr_init(struct dram_timing_info *timing_info);
-void lpddr4_cfg_phy(struct dram_timing_info *timing_info);
+void ddr_cfg_phy(struct dram_timing_info *timing_info);
void load_lpddr4_phy_pie(void);
void ddrphy_trained_csr_save(struct dram_cfg_param *, unsigned int);
void dram_config_save(struct dram_timing_info *, unsigned long);